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Ondrej Subrt
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Conference and Workshop Papers
- 2021
- [c11]Ondrej Subrt, Martin Bodlák, Vladimír Jarý, Antonín Kveton, Josef Nový, Miroslav Virius, Martin Zemko:
Dynamic Programming and Greedy Heuristic in the Load Balancing Problem for the iFDAQ of the COMPASS Experiment at CERN. ISEEIE 2021: 283-294 - 2020
- [c10]Ondrej Subrt, Martin Bodlák, Matous Jandek, Vladimír Jarý, Antonín Kveton, Josef Nový, Miroslav Virius, Martin Zemko:
Reinforcement Learning in the Load Balancing Problem for the iFDAQ of the COMPASS Experiment at CERN. ICAART (2) 2020: 734-741 - 2019
- [c9]Ondrej Subrt, Martin Bodlák, Matous Jandek, Vladimír Jarý, Antonín Kveton, Josef Nový, Jan Tomsa, Miroslav Virius:
Modified Differential Evolution in the Load Balancing Problem for the iFDAQ of the COMPASS Experiment at CERN. IJCCI 2019: 213-220 - 2018
- [c8]Jiri Nahlik, Jirí Hospodka, Ondrej Subrt:
SC Filter Optimization Performance by Hybrid Simplex Algorithm. SMACD 2018: 285-288 - 2016
- [c7]Ondrej Subrt
, Vojtech Merunka
:
The Algorithmizable Modeling of the Object-Oriented Data Model in Craft.CASE. EOMAS@CAiSE 2016: 98-110 - 2010
- [c6]Tomás Urban, Ondrej Subrt, Pravoslav Martínek:
Versatile sub-bandgap reference IP core. DDECS 2010: 393-398 - 2009
- [c5]Miloslav Kubar, Ondrej Subrt, Pravoslav Martínek, Jiri Jakovenko
:
Experience in Virtual Testing of RSD cyclic A/D converters. DDECS 2009: 178-181 - 2008
- [c4]Ondrej Subrt, Petr Struhovský, Pravoslav Martínek, Jirí Hospodka:
Virtual Testing Environment for A/D Converters in Verilog-A and Maple Platform. DDECS 2008: 283-286 - 2007
- [c3]Petr Struhovský, Ondrej Subrt, Jirí Hospodka, Pravoslav Martínek:
Developing Virtual ADC Testing Environment in MAPLE. DDECS 2007: 417-422 - 2006
- [c2]Ondrej Subrt, Pravoslav Martínek:
A Novel Design Evaluation Concept Applied to Switched-Current Algorithmic A/D Converters. DDECS 2006: 108-112 - 2003
- [c1]Ondrej Subrt:
A versatile structure of S31-GGA-casc switched-current memory cell with complex suppression of memorizing errors. ESSCIRC 2003: 587-590
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