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ORCIDDionysios Filippas
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2020 – today
- 2024
[j5]Dionysios Filippas
, Christodoulos Peltekis, Vasileios Titopoulos, Ioannis Kansizoglou, Georgios Ch. Sirakoulis, Antonios Gasteratos, Giorgos Dimitrakopoulos:
A High-Level Synthesis Library for Synthesizing Efficient and Functional-Safe CNN Dataflow Accelerators. IEEE Access 12: 57194-57208 (2024)- [c6]Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos:
Error Checking for Sparse Systolic Tensor Arrays. AICAS 2024: 552-556 - [i6]Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos:
Error Checking for Sparse Systolic Tensor Arrays. CoRR abs/2402.10850 (2024) - [i5]Kosmas Alexandridis, Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos:
Floating-Point Multiply-Add with Approximate Normalization for Low-Cost Matrix Engines. CoRR abs/2408.11997 (2024) - 2023
- [j4]Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos:
Exploiting data encoding and reordering for low-power streaming in systolic arrays. Microprocess. Microsystems 102: 104938 (2023) - [j3]Dionysios Filippas, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos:
Streaming Dilated Convolution Engine. IEEE Trans. Very Large Scale Integr. Syst. 31(3): 401-405 (2023) - [j2]Apostolos Stefanidis, Ioanna Zoumpoulidou, Dionysios Filippas, Giorgos Dimitrakopoulos, Georgios Ch. Sirakoulis:
Synthesis of Approximate Parallel-Prefix Adders. IEEE Trans. Very Large Scale Integr. Syst. 31(11): 1686-1699 (2023) - [c5]Dionysios Filippas, Christodoulos Peltekis, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos:
Reduced-Precision Floating-Point Arithmetic in Systolic Arrays with Skewed Pipelines. AICAS 2023: 1-5 - [c4]Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos, Dionisios N. Pnevmatikatos:
ArrayFlex: A Systolic Array Architecture with Configurable Transparent Pipelining. DATE 2023: 1-6 - [c3]Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos:
Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating. MOCAST 2023: 1-4 - [i4]Dionysios Filippas, Christodoulos Peltekis, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos:
Reduced-Precision Floating-Point Arithmetic in Systolic Arrays with Skewed Pipelines. CoRR abs/2304.01668 (2023) - [i3]Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos:
Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating. CoRR abs/2304.12691 (2023) - [i2]Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos A. Nicopoulos:
The Case for Asymmetric Systolic Array Floorplanning. CoRR abs/2309.02969 (2023) - 2022
- [j1]Dionysios Filippas, Nikolaos Margomenos, Nikolaos Mitianoudis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos:
Low-Cost Online Convolution Checksum Checker. IEEE Trans. Very Large Scale Integr. Syst. 30(2): 201-212 (2022) - [c2]Christodoulos Peltekis, Dionysios Filippas, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos:
FusedGCN: A Systolic Three-Matrix Multiplication Architecture for Graph Convolutional Networks. ASAP 2022: 93-97 - [c1]Dionysios Filippas, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos:
LeapConv: An Energy-Efficient Streaming Convolution Engine with Reconfigurable Stride. ISVLSI 2022: 200-205 - [i1]Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos, Dionisios N. Pnevmatikatos:
ArrayFlex: A Systolic Array Architecture with Configurable Transparent Pipelining. CoRR abs/2211.12600 (2022)
Coauthor Index
aka: Chrysostomos A. Nicopoulos
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