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Journal Articles
- 2010
[j6]Masaaki Soda, Ningyi Wang, Michio Yotsuyanagi:
Low-Voltage Operational Active Inductor for LNA Circuit. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(12): 2609-2615 (2010)- [j5]Yuji Nakajima, Akemi Sakaguchi, Toshio Ohkido, Norihito Kato, Tetsuya Matsumoto, Michio Yotsuyanagi:
A Background Self-Calibrated 6b 2.7 GS/s ADC With Cascade-Calibrated Folding-Interpolating Architecture. IEEE J. Solid State Circuits 45(4): 707-718 (2010) - 2000
- [j4]Muneo Fukaishi, Kazuyuki Nakamura, Hideki Heiuchi, Yoshinori Hirota, Yoetsu Nakazawa, Hidenori Ikeno, Hiroshi Hayama, Michio Yotsuyanagi:
A 20-Gb/s CMOS multichannel transmitter and receiver chip set for ultra-high-resolution digital displays. IEEE J. Solid State Circuits 35(11): 1611-1618 (2000) - 1999
- [j3]Muneo Fukaishi, Satoshi Nakamura, Akio Tajima, Yasushi Kinoshita, Yoshihiko Suemura, Hisamitsu Suzuki, Toshiro Itani, Hidenobu Miyamoto, Naoya Henmi, Tohru Yamazaki, Michio Yotsuyanagi:
A 2.125-Gb/s BiCMOS fiber channel transmitter for serial data communications. IEEE J. Solid State Circuits 34(9): 1325-1330 (1999) - 1998
- [j2]Muneo Fukaishi, Kazuyuki Nakamura, Masaharu Sato, Yutaka Tsutsui, Syuji Kishi, Michio Yotsuyanagi:
A 4.25-Gb/s CMOS fiber channel transceiver with asynchronous tree-type demultiplexer and frequency conversion architecture. IEEE J. Solid State Circuits 33(12): 2139-2147 (1998) - 1995
- [j1]Michio Yotsuyanagi, Hiroshi Hasegawa, Motoi Yamaguchi, Masaki Ishida, Kazuya Sone:
A 2 V, 10 b, 20 Msample/s, mixed-mode subranging CMOS A/D converter. IEEE J. Solid State Circuits 30(12): 1533-1537 (1995)
Conference and Workshop Papers
- 2012
- [c1]Yuji Nakajima, Norihito Kato, Akemi Sakaguchi, Toshio Ohkido, Kenji Shimomaki, Hiroko Masuda, Chikahiro Shiroma, Michio Yotsuyanagi, Takahiro Miki:
A 7b 1.4GS/s ADC with offset drift suppression techniques for one-time calibration. CICC 2012: 1-4
Coauthor Index
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