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Kwang-Hee Choi
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2010 – 2019
- 2018
- [c2]Minseob Lee, Shinwoong Kim, Hwasuk Cho, Jahyun Koo, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 0.3-to-1.2V frequency-scalable fractional-N ADPLL with a speculative dual-referenced interpolating TDC. ISSCC 2018: 122-124 - 2017
- [c1]Hwasuk Cho, Kihwan Seong, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
8.7 A 0.0047mm2 highly synthesizable TDC- and DCO-less fractional-N PLL with a seamless lock range of fREF to 1GHz. ISSCC 2017: 154-155
2000 – 2009
- 2009
- [j2]Kwang-Hee Choi, Jung-Bum Shin, Jae-Yoon Sim, Hong-June Park:
An Interpolating Digitally Controlled Oscillator for a Wide-Range All-Digital PLL. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(9): 2055-2063 (2009) - 2008
- [j1]Sang-Hune Park, Kwang-Hee Choi, Jung-Bum Shin, Jae-Yoon Sim, Hong-June Park:
A Single-Data-Bit Blind Oversampling Data-Recovery Circuit With an Add-Drop FIFO for USB2.0 High-Speed Interface. IEEE Trans. Circuits Syst. II Express Briefs 55-II(2): 156-160 (2008)
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last updated on 2024-04-24 23:17 CEST by the dblp team
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