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Yi-Zhan Hsieh

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2020 – today

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2021
[j1]
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Tsai-Chieh Chen, Chia-Cheng Pai, Yi-Zhan Hsieh, Hsiao-Yin Tseng, Chien-Mo James Li, Tsung-Te Liu, I-Wei Chiu:
Clock-Less DFT and BIST for Dual-Rail Asynchronous Circuits. J. Electron. Test. 37(4): 453-471 (2021)
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Yi-Zhan Hsieh, Hsiao-Yin Tseng, I-Wei Chiu, James Chien-Mo Li:
Fault Modeling and Testing of Spiking Neural Network Chips. ITC-Asia 2021: 1-6

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