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Markus Weinhardt
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Books and Theses
- 1997
- [b1]Markus Weinhardt:
Übersetzungsmethoden für strukturprogrammierbare Rechner. Karlsruhe Institute of Technology, Logos-Verlag 1997, ISBN 3-89722-011-3, pp. 1-147
Journal Articles
- 2015
- [j4]Markus Weinhardt, Bernhard Lang, Frank M. Thiesing, Alexander Krieger, Thomas Kinder:
SAccO: An implementation platform for scalable FPGA accelerators. Microprocess. Microsystems 39(7): 543-552 (2015) - 2010
- [j3]João M. P. Cardoso, Pedro C. Diniz, Markus Weinhardt:
Compiling for reconfigurable computing: A survey. ACM Comput. Surv. 42(4): 13:1-13:65 (2010) - 2003
- [j2]Volker Baumgarten, G. Ehlers, Frank May, Armin Nückel, Martin Vorbach, Markus Weinhardt:
PACT XPP - A Self-Reconfigurable Data Processing Architecture. J. Supercomput. 26(2): 167-184 (2003) - 2001
- [j1]Markus Weinhardt, Wayne Luk:
Pipeline vectorization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(2): 234-248 (2001)
Conference and Workshop Papers
- 2022
- [c21]Markus Weinhardt:
An Analysis of Mapping Polybench Kernels to HPC CGRAs. IPDPS Workshops 2022: 647-654 - 2021
- [c20]Philipp S. Käsgen, Mohamed Messelka, Markus Weinhardt:
HiPReP: High-Performance Reconfigurable Processor - Architecture and Compiler. FPL 2021: 380-381 - 2019
- [c19]Philipp S. Käsgen, Markus Weinhardt, Christian Hochberger:
Dynamic Scheduling of Pipelined Functional Units in Coarse-Grained Reconfigurable Array Elements. ARCS 2019: 156-167 - [c18]Markus Weinhardt:
High-Level Synthesis Oriented Restructuring of Functions with While Loops. IPDPS Workshops 2019: 115-122 - 2018
- [c17]Philipp S. Käsgen, Markus Weinhardt:
Using Template Metaprogramming for Hardware Description. MBMV 2018 - [c16]Philipp S. Käsgen, Markus Weinhardt, Christian Hochberger:
A Coarse-Grained Reconfigurable Array for High-Performance Computing Applications. ReConFig 2018: 1-4 - 2016
- [c15]Markus Weinhardt:
Comparing Register-Transfer-, C-, and System-Level Implementations of an Image Enhancement Algorithm. ARC 2016: 245-257 - 2013
- [c14]Markus Weinhardt, Alexander Krieger, Thomas Kinder:
A framework for PC applications with portable and scalable FPGA accelerators. ReConFig 2013: 1-6 - 2012
- [c13]Markus Weinhardt:
Teaching Hardware/Software Codesign on a Reconfigurable Computing Platform. ARC 2012: 264-275 - 2011
- [c12]Eberhard Schüler, Martin Vorbach, Frank May, Markus Weinhardt:
Dynamic Reconfiguration for Irregular Code Using FNC-PAE Processor Cores. IPDPS Workshops 2011: 244-249 - 2004
- [c11]Markus Weinhardt, Martin Vorbach, Volker Baumgarten, Frank May:
Using function folding to improve silicon efficiency of reconfigurable arithmetic arrays. FPT 2004: 239-245 - 2003
- [c10]João M. P. Cardoso, Markus Weinhardt:
From C Programs to the Configure-Execute Model. DATE 2003: 10576-10581 - 2002
- [c9]João M. P. Cardoso, Markus Weinhardt:
Fast and Guaranteed C Compilation onto the PACT-XPP? Reconfigurable Computing Platform. FCCM 2002: 291-292 - [c8]João M. P. Cardoso, Markus Weinhardt:
XPP-VC: A C Compiler with Temporal Partitioning for the PACT-XPP Architecture. FPL 2002: 864-874 - 2001
- [c7]Markus Weinhardt, Wayne Luk:
Task-Parallel Programming of Reconfigurable Systems. FPL 2001: 172-181 - 2000
- [c6]Markus Weinhardt, Wayne Luk:
Evaluating Hardware Compilation Techniques. FCCM 2000: 333-334 - 1999
- [c5]Markus Weinhardt, Wayne Luk:
Pipeline Vectorization for Reconfigurable Systems. FCCM 1999: 52-62 - [c4]Markus Weinhardt, Wayne Luk:
Memory Access Optimization and RAM Inference for Pipeline Vectorization. FPL 1999: 61-70 - 1996
- [c3]Markus Weinhardt:
Portable Pipeline Synthesis for FCCMs. FPL 1996: 1-13 - [c2]Markus Weinhardt:
Computing Weight Distributions of Binary Linear Block Codes on a CCM. FPL 1996: 425-430 - 1995
- [c1]Markus Weinhardt:
Integer Programming for Partitioning in Software Oriented Codesign. FPL 1995: 227-234
Parts in Books or Collections
- 2016
- [p1]João M. P. Cardoso, Markus Weinhardt:
High-Level Synthesis. FPGAs for Software Programmers 2016: 23-47
Informal and Other Publications
- 2014
- [i1]Markus Weinhardt, Rainer Höckmann, Thomas Kinder:
High-Level Design of Portable and Scalable FPGA Accelerators. CoRR abs/1408.5383 (2014)
Coauthor Index
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