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2010 – 2019
- 2012
[j3]Doron Bustan, Dmitry Korchemny, Erik Seligman
, Jin Yang:
SystemVerilog Assertions: Past, Present, and Future SVA Standardization Experience. IEEE Des. Test Comput. 29(2): 23-31 (2012)
2000 – 2009
- 2009
- [c8]Zurab Khasidashvili, Daher Kaiss, Doron Bustan:
A compositional theory for post-reboot observational equivalence checking of hardware. FMCAD 2009: 136-143 - 2006
- [c7]Doron Bustan, John Havlicek:
Some Complexity Results for SystemVerilog Assertions. CAV 2006: 205-218 - 2005
- [c6]Doron Bustan, Alon Flaisher, Orna Grumberg, Orna Kupferman, Moshe Y. Vardi:
Regular Vacuity. CHARME 2005: 191-206 - 2004
- [j2]Doron Bustan, Orna Grumberg:
Applicability of fair simulation. Inf. Comput. 194(1): 1-18 (2004) - [c5]Doron Bustan, Sasha Rubin, Moshe Y. Vardi:
Verifying omega-Regular Properties of Markov Chains. CAV 2004: 189-201 - [c4]Doron Bustan, Orna Kupferman, Moshe Y. Vardi:
A Measured Collapse of the Modal µ-Calculus Alternation Hierarchy. STACS 2004: 522-533 - 2003
- [j1]Doron Bustan, Orna Grumberg:
Simulation-based minimazation. ACM Trans. Comput. Log. 4(2): 181-206 (2003) - [c3]Roy Armoni, Doron Bustan, Orna Kupferman, Moshe Y. Vardi:
Resets vs. Aborts in Linear Temporal Logic. TACAS 2003: 65-80 - 2002
- [b1]Doron Bustan:
Equivalence-based reductions and checking for preorders. Technion - Israel Institute of Technology, Israel, 2002 - [c2]Doron Bustan, Orna Grumberg:
Applicability of Fair Simulation. TACAS 2002: 401-414 - 2000
- [c1]Doron Bustan, Orna Grumberg:
Simulation Based Minimization. CADE 2000: 255-270
Coauthor Index
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