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Shulan Xiao
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2020 – today
- 2022
- [c2]Baibhab Chatterjee, K. Gaurav Kumar, Shulan Xiao, Gourab Barik, Krishna Jayant, Shreyas Sen:
A 1.8 μW 5.5 mm3 ADC-less Neural Implant SoC utilizing 13.2pJ/Sample Time-domain Bi-phasic Quasi-static Brain Communication with Direct Analog to Time Conversion. ESSCIRC 2022: 209-212 - [i1]Baibhab Chatterjee, Mayukh Nath, K. Gaurav Kumar, Shulan Xiao, Jayant Krishna, Shreyas Sen:
Bi-Phasic Quasistatic Brain Communication for Fully Untethered Connected Brain Implants. CoRR abs/2205.08540 (2022) - 2021
- [c1]Baibhab Chatterjee, K. Gaurav Kumar, Mayukh Nath, Shulan Xiao, Nirmoy Modak, Debayan Das, Jayant Krishna, Shreyas Sen:
A 1.15μW 5.54mm3 Implant with a Bidirectional Neural Sensor and Stimulator SoC utilizing Bi-Phasic Quasi-static Brain Communication achieving 6kbps-10Mbps Uplink with Compressive Sensing and RO-PUF based Collision Avoidance. VLSI Circuits 2021: 1-2
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last updated on 2024-05-08 21:43 CEST by the dblp team
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