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Shivram Mansore

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2010 – 2019

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2018
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  - journals/elektrik/MansoreG18
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  - https://dblp.org/rec/journals/elektrik/MansoreG18
Shivram Mansore, Radheshyam Gamad:
A data-aware write-assist 10T SRAM cell with bit-interleaving capability. Turkish J. Electr. Eng. Comput. Sci. 26(5): 2361-2373 (2018)
2017
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Shivram Mansore, Radheshyam Gamad, D. K. Mishra:
A Single-Ended Read Decoupled 9T SRAM Cell for Low Power Applications. iNIS 2017: 220-223

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