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2020 – today
- 2021
[c7]Yung-Huei Lee, P. J. Liao, Vincent Hou, Dawei Heh, Chih-Hung Nien, Wen-Hsien Kuo, Gary T. Chen, Shao-Ming Yu, Yu-Sheng Chen, Jau-Yi Wu, Xinyu Bao, Carlos H. Diaz
:
Composition Segregation of Ge-Rich GST and Its Effect on Reliability. IRPS 2021: 1-6- [c6]Shy-Jay Lin, Yen-Lin Huang, MingYaun Song, Chien-Ming Lee, Fen Xue, Guan-Long Chen, Shan-Yi Yang, Yao-Jen Chang, I-Jung Wang, Yu-Chen Hsin, Yi-Hui Su, Jeng-Hua Wei, Chi-Feng Pai, Shan X. Wang, Carlos H. Diaz:
Challenges toward Low-Power SOT-MRAM. IRPS 2021: 1-7
2010 – 2019
- 2011
- [c5]S. H. Yang, J. Y. Sheu, M. K. Ieong, M. H. Chiang, T. Yamamoto, J. J. Liaw, S. S. Chang, Y. M. Lin, T. L. Hsu, J. R. Hwang, J. K. Ting, C. H. Wu, K. C. Ting, F. C. Yang, C. M. Liu, I. L. Wu, Y. M. Chen, S. J. Chent, K. S. Chen, J. Y. Cheng, M. H. Tsai, W. Chang, R. Chen, C. C. Chen, T. L. Lee, C. K. Lin, S. C. Yang, Y. M. Sheu, J. T. Tzeng, L. C. Lu, S. M. Jang, Carlos H. Diaz, Yuh-Jier Mii:
28nm metal-gate high-K CMOS SoC technology for high-performance mobile applications. CICC 2011: 1-5
2000 – 2009
- 2005
- [c4]Carlos H. Diaz, K. H. Fung, Ying-Keung Leung, Chung-Cheng Wu, Chih-Ping Chao, G. J. Chern, Wesley L. Lin, Chien-Ming Lee, Fang-Shi Lai, Mi-Chang Chang, Yuan-Chen Sun:
Device trends and implications on circuit design in advanced CMOS technologies. CICC 2005: 675-679 - 2003
- [j3]Carlos H. Diaz, Mi-Chang Chang, Tong-Chern Ong, Jack Yuan-Chen Sun:
Process and circuit design interlock for application-dependent scaling tradeoffs and optimization in the SoC era. IEEE J. Solid State Circuits 38(3): 444-449 (2003) - [c3]Ke-Wei Su, Yi-Ming Sheu, Chung-Kai Lin, Sheng-Jier Yang, Wen-Jya Liang, Xuemei Xi, Chung-Shi Chiang, Jaw-Kang Her, Yu-Tai Chia, Carlos H. Diaz, Chenming Hu:
A scaleable model for STI mechanical stress effect on layout dependence of MOS electrical characteristics. CICC 2003: 245-248 - [c2]Denny D. Tang, Carlos H. Diaz, Chih-Ping Chao, Humning Hsu, Chwan-Ying Lee, Chih-Sheng Chang, Yu-Tai Chia, Ming-Ta Yang, Jack Yuan-Chen Sun:
Foundry technology for 130nm and beyond SoC. CICC 2003: 343-350 - 2002
- [j2]Bendik Kleveland, Carlos H. Diaz, Dieter Vook, Liam Madden, Thomas H. Lee, S. Simon Wong:
Correction to "exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design". IEEE J. Solid State Circuits 37(2): 255 (2002) - [c1]Carlos H. Diaz, Mi-Chang Chang, Tong-Chern Ong, Jack Yuan-Chen Sun:
Application-dependent scaling tradeoffs and optimization in the SoC era. CICC 2002: 475-478 - 2001
- [j1]Bendik Kleveland, Carlos H. Diaz, Dieter Vook, Liam Madden, Thomas H. Lee, S. Simon Wong:
Exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design. IEEE J. Solid State Circuits 36(10): 1480-1488 (2001)
Coauthor Index
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