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Theodore E. Chavannes

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1960 – 1969

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1964
[c1]
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William I. Pyle, Theodore E. Chavannes, Robert M. MacIntyre:
A 10 Mc NDRO BIAX memory of 1024 word, 48 bit per word capacity. AFIPS Fall Joint Computing Conference (1) 1964: 69-80

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