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Books and Theses
- 2011
[b1]Martin Zabel:
Effiziente Mehrkernarchitektur für eingebettete Java-Bytecode-Prozessoren. Dresden University of Technology, 2011, pp. 1-102
Conference and Workshop Papers
- 2017
- [c13]Sebastian Kruse, Thorsten Papenbrock, Christian Dullweber, Moritz Finke, Manuel Hegner, Martin Zabel, Christian Zöllner, Felix Naumann:
Fast Approximate Discovery of Inclusion Dependencies. BTW 2017: 207-226 - 2016
- [c12]Thomas B. Preußer, Martin Zabel, Patrick Lehmann, Rainer G. Spallek:
The portable open-source IP core and utility library PoC. ReConFig 2016: 1-6 - 2014
- [c11]Oliver Knodel
, Martin Zabel, Patrick Lehmann, Rainer G. Spallek:
Educating hardware design - From primary school children to postgraduate engineers. FPL 2014: 1-4 - 2012
- [c10]Martin Zabel, Thomas B. Preußer, Rainer G. Spallek:
Increasing the efficiency of an embedded multi-core bytecode processor using an object cache. JTRES 2012: 88-97 - 2011
- [c9]Thomas B. Preußer, Martin Zabel, Rainer G. Spallek:
Accelerating Computations on FPGA Carry Chains by Operand Compaction. IEEE Symposium on Computer Arithmetic 2011: 95-102 - 2010
- [c8]Martin Zabel, Rainer G. Spallek:
Application requirements and efficiency of embedded Java bytecode multi-cores. JTRES 2010: 46-52 - 2009
- [c7]Martin Zabel, Thomas B. Preußer, Rainer G. Spallek:
High-Level Architecture Modelling Assisting the Processor Platform Development, Debugging and Simulation. MBMV 2009: 187-196 - 2007
- [c6]Martin Zabel, Thomas B. Preußer, Peter Reichel, Rainer G. Spallek:
Secure, Real-Time and Multi-Threaded General-Purpose Embedded Java Microarchitecture. DSD 2007: 59-62 - [c5]Thomas Preußer, Martin Zabel, Rainer G. Spallek:
Enabling constant-time interface method dispatch in embedded Java processors. JTRES 2007: 196-205 - [c4]Thomas Preußer, Martin Zabel, Rainer G. Spallek:
Bump-pointer method caching for embedded Java processors. JTRES 2007: 206-210 - 2006
- [c3]Steffen Köhler, Martin Zimmerling, Martin Zabel, Rainer G. Spallek:
Prototyping and Application Development Framework for Dynamically Reconfigurable DSP Architectures. ARCS Workshops 2006: 142-151 - 2005
- [c2]Martin Zabel, Steffen Köhler, Martin Zimmerling, Thomas B. Preußer, Rainer G. Spallek:
Design space exploration of coarse-grain reconfigurable DSPs. ReConFig 2005 - 2004
- [c1]Steffen Köhler, Jens Braunes, Thomas Preußer, Martin Zabel, Rainer G. Spallek:
Increasing ILP of RISC Microprocessors Through Control-Flow Based Reconfiguration. FPL 2004: 781-790
Coauthor Index
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