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Naheem Olakunle Adesina
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2020 – today
- 2023
- [c7]Naheem Olakunle Adesina, Md Azmot Ullah Khan, Jian Xu:
Design of Energy Efficient Ring Oscillator and Full Adder Circuit using Compact Model of MoS2 Channel TFET. CCWC 2023: 907-914 - [c6]Naheem Olakunle Adesina, Baorui Wang, William Morell, Md Azmot Ullah Khan:
Experimental Analyses of a Noise-Based True Random Number Generator. CCWC 2023: 915-918 - 2021
- [c5]Naheem Olakunle Adesina, Md Azmot Ullah Khan, Ashok Srivastava:
High Q-Factor Graphene-Based Inductor CMOS LC Voltage Controlled Oscillator for PLL Applications. CCECE 2021: 1-7 - [c4]Md Azmot Ullah Khan, Naheem Olakunle Adesina, Jian Xu
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Modeling of MoS2 Tunnel Field Effect Transistor in Verilog-A for VLSI Circuit Design. CCECE 2021: 1-6 - [c3]Naheem Olakunle Adesina, Ashok Srivastava, Md Azmot Ullah Khan:
Evaluating the Performances of Memristor, FinFET, and Graphene TFET in VLSI Circuit Design. CCWC 2021: 591-595 - [c2]Naheem Olakunle Adesina, Md Azmot Ullah Khan, Jian Xu
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Design and Performance Comparisons of Tri-State Buffer Driver in Graphene, TMDC, and CNT-Based Transistor Technologies. iSES 2021: 289-293 - 2020
- [c1]Naheem Olakunle Adesina, Ashok Srivastava:
A 250 MHz-to-1.6 GHz Phase Locked Loop Design in Hybrid FinFET-Memristor Technology. UEMCON 2020: 901-906
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last updated on 2025-01-09 13:01 CET by the dblp team
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