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Bernard N. Sheehan

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2000 – 2009

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2007
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Bernard N. Sheehan:
Realizable Reduction of RC Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(8): 1393-1407 (2007)
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Bernard N. Sheehan, Yousef Saad:
Higher Order Orthogonal Iteration of Tensors (HOOI) and its Relation to PCA and GLRAM. SDM 2007: 355-365
2003
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Bernard N. Sheehan:
Branch Merge Reduction of RLCM Networks. ICCAD 2003: 658-664
2002
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Bernard N. Sheehan:
Osculating Thevenin model for predicting delay and slew of capacitively characterized cells. DAC 2002: 866-869
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Bernard N. Sheehan:
Library Compatible Ceff for Gate-Level Timing. DATE 2002: 826-830
2000
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Bernard N. Sheehan:
Predicting coupled noise in RC circuits by matching 1, 2, and 3 moments. DAC 2000: 532-535
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Bernard N. Sheehan:
Predicting Coupled Noise in RC Circuits. DATE 2000: 517-521

1990 – 1999

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1999
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Bernard N. Sheehan:
ENOR: Model Order Reduction of RLC Circuits Using Nodal Equations for Efficient Factorization. DAC 1999: 17-21
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Bernard N. Sheehan:
Projective Convolution: RLC Model-Order Reduction Using the Impulse Response. DATE 1999: 669-
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Bernard N. Sheehan:
TICER: realizable reduction of extracted RC circuits. ICCAD 1999: 200-203
1996
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Bernard N. Sheehan:
An AWE Technique for Fast Printed Circuit Board Delays. DAC 1996: 539-543

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