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Shingo Nakaya

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2000 – 2009

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2002
[j1]
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Shinya Yamasaki, Shingo Nakaya, Shin'ichi Wakabayashi, Tetsushi Koide:
A Performance-Driven Floorplanning Method with Interconnect Performance Estimation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(12): 2775-2784 (2002)
2000
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Shingo Nakaya, Tetsushi Koide, Shin'ichi Wakabayashi:
An adaptive genetic algorithm for VLSI floorplanning based on sequence-pair. ISCAS 2000: 65-68

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