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ORCIDMaurizio Damiani
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2020 – today
- 2023
[j11]Maurizio Damiani:
Partially unate Boolean functions: Properties of their sum-of-products representations. Discret. Appl. Math. 338: 278-292 (2023)
2000 – 2009
- 2003
- [c20]Maurizio Damiani, Andrei Y. Selchenko:
Boolean Technology Mapping Based on Logic Decomposition. SBCCI 2003: 35-40 - 2000
- [j10]Alessandro Bogliolo
, Michele Favalli, Maurizio Damiani:
Enabling testability of fault-tolerant circuits by means of IDDQ-checkable voters. IEEE Trans. Very Large Scale Integr. Syst. 8(4): 415-419 (2000)
1990 – 1999
- 1999
- [c19]Valeria Bertacco, Maurizio Damiani, Stefano Quer:
Cycle-Based Symbolic Simulation of Gate-Level Synchronous Circuits. DAC 1999: 391-396 - 1997
- [j9]Maurizio Damiani:
The state reduction of nondeterministic finite-state machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(11): 1278-1291 (1997) - [c18]Valeria Bertacco, Maurizio Damiani:
The disjunctive decomposition of logic functions. ICCAD 1997: 78-82 - 1996
- [j8]Jerry Chih-Yuan Yang, Giovanni De Micheli, Maurizio Damiani:
Scheduling and control generation with environmental constraints based on automata representations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(2): 166-183 (1996) - [c17]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Maurizio Damiani, Leonardo Impagliazzo, G. Sartore:
On-line Testing of an Off-the-shelf Microprocessor Board for Safety-critical Applications. EDCC 1996: 190-202 - [c16]Valeria Bertacco, Maurizio Damiani:
Boolean Function Representation Using Parallel-Access Diagrams. Great Lakes Symposium on VLSI 1996: 112-117 - [c15]Valeria Bertacco, Maurizio Damiani:
Boolean Function Representation Based on Disjoint-Support Decompositions. ICCD 1996: 27-32 - [c14]Vishwani D. Agrawal, Ronald D. Blanton, Maurizio Damiani:
Synthesis of Self-Testing Finite State Machines from High-Level Specifications. ITC 1996: 757-766 - 1995
- [j7]Maurizio Damiani, Jerry Chih-Yuan Yang, Giovanni De Micheli:
Optimization of combinational logic circuits based on compatible gates. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(11): 1316-1327 (1995) - [c13]Alessandro Bogliolo, Maurizio Damiani:
Synthesis of multilevel fault-tolerant combinational circuits. ED&TC 1995: 80-85 - [c12]Alessandro Bogliolo, Maurizio Damiani, Piero Olivo, Bruno Riccò:
Reliability evaluation of combinational logic circuits by symbolic simulation. VTS 1995: 235-243 - [c11]Alessandro Bogliolo, Maurizio Damiani:
Synthesis of combinational circuits with special fault-handling capabilitie. VTS 1995: 454-459 - 1994
- [c10]Maurizio Damiani:
Nondeterministic finite-state machines and sequential don't cares. EDAC-ETC-EUROASIC 1994: 192-198 - [c9]Jerry Chih-Yuan Yang, Giovanni De Micheli, Maurizio Damiani:
Scheduling with Environmental Constraints based on Automata Representations. EDAC-ETC-EUROASIC 1994: 495-501 - [c8]Jérôme Fron, Jerry Chih-Yuan Yang, Maurizio Damiani, Giovanni De Micheli:
A Synthesis Framework Based on Trace and Automata Theory. ISCAS 1994: 291-294 - 1993
- [j6]Maurizio Damiani, Giovanni De Micheli:
Don't care set specifications in combinational and synchronous logic circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(3): 365-388 (1993) - [c7]Maurizio Damiani, Jerry Chih-Yuan Yang, Giovanni De Micheli:
Optimization of Combinational Logic Circuits Based on Compatible Gates. DAC 1993: 631-636 - 1992
- [j5]Silvia Ercolani, Michele Favalli, Maurizio Damiani, Piero Olivo, Bruno Riccò:
Testability measures in pseudorandom testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(6): 794-800 (1992) - [c6]Maurizio Damiani, Giovanni De Micheli:
Recurrence Equations and the Optimization of Synchronous Logic Circuits. DAC 1992: 556-561 - 1991
- [j4]Maurizio Damiani, Piero Olivo, Bruno Riccò:
Analysis and Design of Linear Finite State Machines for Signature Analysis Testing. IEEE Trans. Computers 40(9): 1034-1045 (1991) - [j3]Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Riccò:
Fault simulation of unconventional faults in CMOS circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(5): 677-682 (1991) - 1990
- [j2]Maurizio Damiani, Piero Olivo, Michele Favalli, Silvia Ercolani, Bruno Riccò:
Aliasing in signature analysis testing with multiple input shift registers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(12): 1344-1353 (1990) - [c5]Maurizio Damiani, Giovanni De Micheli:
Observability Don't Care Sets and Boolean Relations. ICCAD 1990: 502-505
1980 – 1989
- 1989
- [j1]Maurizio Damiani, Piero Olivo, Michele Favalli, Bruno Riccò:
An analytical model for the aliasing probability in signature analysis testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(11): 1133-1144 (1989) - [c4]Silvia Ercolani, Michele Favalli, Maurizio Damiani, Piero Olivo, Bruno Riccò:
Improved testability evaluations in combinational logic networks. ICCD 1989: 352-355 - [c3]Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Riccò:
CMOS Design for Improved IC Testability. ITC 1989: 934 - [c2]Piero Olivo, Maurizio Damiani, Bruno Riccò:
On the Design of Multiple-Input Shift-Registers for Signature Analysis Testing. ITC 1989: 936 - 1988
- [c1]Maurizio Damiani, Piero Olivo, Michele Favalli, Bruno Riccò:
Aliasing errors in signature analysis testing of integrated circuits. ICCD 1988: 458-461
Coauthor Index
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