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Fikret Dülger
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Journal Articles
- 2011
- [j5]Robert Bogdan Staszewski, Khurram Waheed, Fikret Dülger, Oren E. Eliezer:
Spur-Free Multirate All-Digital PLL for Mobile Phones in 65 nm CMOS. IEEE J. Solid State Circuits 46(12): 2904-2919 (2011) - [j4]Khurram Waheed, Robert Bogdan Staszewski, Fikret Dülger, Mahbuba Sheba Ullah, Socrates D. Vamvakos:
Spurious-Free Time-to-Digital Conversion in an ADPLL Using Short Dithering Sequences. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(9): 2051-2060 (2011) - 2006
- [j3]Bertan Bakkaloglu, Paul Fontaine, Ahmed Nader Mohieldin, Solti Peng, Sher Jiun Fang, Fikret Dülger:
A 1.5-V multi-mode quad-band RF receiver for GSM/EDGE/CDMA2K in 90-nm digital CMOS process. IEEE J. Solid State Circuits 41(5): 1149-1159 (2006) - 2003
- [j2]Fikret Dulger, Edgar Sánchez-Sinencio, José Silva-Martínez:
A 1.3-V 5-mW fully integrated tunable bandpass filter at 2.1 GHz in 0.35-μm CMOS. IEEE J. Solid State Circuits 38(6): 918-928 (2003) - 1997
- [j1]Ugur Çilingiroglu, Banu Pamir, Zeki Sezgin Günay, Fikret Dülger:
Sampled-analog implementation of application-specific fuzzy controllers. IEEE Trans. Fuzzy Syst. 5(3): 431-442 (1997)
Conference and Workshop Papers
- 2011
- [c4]Robert Bogdan Staszewski, Khurram Waheed, Sudheer K. Vemulapalli, Fikret Dulger, John L. Wallberg, Chih-Ming Hung, Oren E. Eliezer:
Spur-free all-digital PLL in 65nm for mobile phones. ISSCC 2011: 52-54 - 2010
- [c3]Khurram Waheed, Mahbuba Sheba, Robert Bogdan Staszewski, Fikret Dulger, Socrates D. Vamvakos:
Spurious free time-to-digital conversion in an ADPLL using short dithering sequences. CICC 2010: 1-4 - 2006
- [c2]Fikret Dülger, Sher Jiun Fang, Ahmed Nader Mohieldin, Paul Fontaine, Abdellatif Bellaouar, Michel Frechette:
A quad-band receiver for GSM/GPRS/EDGE in 90 nm digital CMOS. ISCAS 2006 - 2002
- [c1]Fikret Dülger, Edgar Sánchez-Sinencio:
Design trade-offs of a symmetric linearized CMOS LC VCO. ISCAS (4) 2002: 397-400
Coauthor Index
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