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ORCIDHaris Volos 0001
Person information
- affiliation: University of Cyprus, Nicosia, Cyprus
- affiliation (former): Google, USA
- affiliation (former): Hewlett Packard Labs, Palo Alto, CA, USA
- affiliation (former): University of Wisconsin - Madison, Madison, WI, USA
Other persons with the same name
- Haris Volos 0002 (aka: Haris Ioannis Volos) — DENSO International America, Inc., Silicon Valley R&D, CA, USA (and 2 more)
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2020 – today
- 2024
[c20]Georgia Antoniou, Haris Volos, Yiannakis Sazeides:
Taming Performance Variability caused by Client-Side Hardware Configuration. IISWC 2024: 94-107- [i7]Georgia Antoniou, Haris Volos, Yiannakis Sazeides:
Taming Performance Variability caused by Client-Side Hardware Configuration. CoRR abs/2410.11554 (2024) - 2023
- [i6]Haris Volos:
The Case for Replication-Aware Memory-Error Protection in Disaggregated Memory. CoRR abs/2309.00304 (2023) - 2022
- [c19]Jawad Haj-Yahya, Haris Volos, Davide B. Bartolini
, Georgia Antoniou, Jeremie S. Kim, Zhe Wang, Kleovoulos Kalaitzidis, Tom Rollet, Zhirui Chen, Ye Geng, Onur Mutlu, Yiannakis Sazeides:
AgileWatts: An Energy-Efficient CPU Core Idle-State Architecture for Latency-Sensitive Server Applications. MICRO 2022: 835-850 - [c18]Georgia Antoniou, Haris Volos, Davide B. Bartolini, Tom Rollet, Yiannakis Sazeides, Jawad Haj-Yahya:
AgilePkgC: An Agile System Idle State Architecture for Energy Proportional Datacenter Servers. MICRO 2022: 851-867 - [i5]Jawad Haj-Yahya, Haris Volos, Davide B. Bartolini, Georgia Antoniou, Jeremie S. Kim, Zhe Wang, Kleovoulos Kalaitzidis, Tom Rollet, Zhirui Chen, Ye Geng, Onur Mutlu, Yiannakis Sazeides:
AgileWatts: An Energy-Efficient CPU Core Idle-State Architecture for Latency-Sensitive Server Applications. CoRR abs/2203.02550 (2022) - [i4]Georgia Antoniou, Haris Volos, Davide B. Bartolini, Tom Rollet, Yiannakis Sazeides, Jawad Haj-Yahya:
AgilePkgC: An Agile System Idle State Architecture for Energy Proportional Datacenter Servers. CoRR abs/2204.10466 (2022) - 2021
- [j4]Haris Volos:
The Case for Replication-Aware Memory-Error Protection in Disaggregated Memory. IEEE Comput. Archit. Lett. 20(2): 130-133 (2021) - [j3]Lei Chen, Jiacheng Zhao, Chenxi Wang, Ting Cao, John N. Zigman, Haris Volos, Onur Mutlu, Fang Lv, Xiaobing Feng, Guoqing Harry Xu, Huimin Cui:
Unified Holistic Memory Management Supporting Multiple Big Data Processing Frameworks over Hybrid Memories. ACM Trans. Comput. Syst. 39(1-4): 2:1-2:38 (2021) - [i3]Kimberly Keeton, Sharad Singhal, Haris Volos, Yupu Zhang, Ramesh Chandra Chaurasiya, Clarete Riana Crasta, Sherin T. George, Nagaraju K. N, Mashood Abdulla K, Kavitha Natarajan, Porno Shome, Sanish Suresh:
MODC: Resilience for disaggregated memory architectures using task-based programming. CoRR abs/2109.05329 (2021)
2010 – 2019
- 2019
- [c17]Chenxi Wang, Huimin Cui, Ting Cao, John N. Zigman, Haris Volos, Onur Mutlu, Fang Lv, Xiaobing Feng, Guoqing Harry Xu:
Panthera: holistic memory management for big data processing over hybrid memories. PLDI 2019: 347-362 - 2018
- [c16]Haris Volos, Kimberly Keeton, Yupu Zhang, Milind Chabbi, Se Kwon Lee, Mark Lillibridge, Yuvraj Patel, Wei Zhang:
Memory-Oriented Distributed Computing at Rack Scale. SoCC 2018: 529 - 2017
- [c15]Sanketh Nalli, Swapnil Haria, Mark D. Hill, Michael M. Swift, Haris Volos, Kimberly Keeton:
An Analysis of Persistent Memory Use with WHISPER. ASPLOS 2017: 135-148 - [c14]Mijung Kim, Jun Li, Haris Volos, Manish Marwah, Alexander Ulanov, Kimberly Keeton, Joseph A. Tucek, Lucy Cherkasova, Le Xu, Pradeep Fernando:
Sparkle: optimizing spark for large memory machines and analytics. SoCC 2017: 656 - [i2]Mijung Kim, Jun Li, Haris Volos, Manish Marwah, Alexander Ulanov, Kimberly Keeton, Joseph A. Tucek, Lucy Cherkasova, Le Xu, Pradeep Fernando:
Sparkle: Optimizing Spark for Large Memory Machines and Analytics. CoRR abs/1708.05746 (2017) - 2016
- [c13]Qi Wang, Ludmila Cherkasova, Jun Li, Haris Volos:
Interconnect Emulator for Aiding Performance Analysis of Distributed Memory Applications. ICPE 2016: 75-83 - 2015
- [c12]Qi Wang, Ludmila Cherkasova, Jun Li, Haris Volos:
InterSense: Interconnect Performance Emulator for Future Scale-out Distributed Memory Applications. MASCOTS 2015: 122-125 - [c11]Haris Volos, Guilherme Magalhaes, Ludmila Cherkasova, Jun Li:
Quartz: A Lightweight Performance Emulator for Persistent Memory Software. Middleware 2015: 37-49 - [c10]Dipanjan Sengupta, Qi Wang, Haris Volos, Ludmila Cherkasova, Jun Li, Guilherme Magalhaes, Karsten Schwan:
A Framework for Emulating Non-Volatile Memory Systemswith Different Performance Characteristics. ICPE 2015: 317-320 - 2014
- [j2]Goetz Graefe, Haris Volos, Hideaki Kimura, Harumi A. Kuno, Joseph A. Tucek, Mark Lillibridge, Alistair C. Veitch:
In-Memory Performance for Big Data. Proc. VLDB Endow. 8(1): 37-48 (2014) - [c9]Haris Volos, Sanketh Nalli, Sankaralingam Panneerselvam, Venkatanathan Varadarajan, Prashant Saxena, Michael M. Swift:
Aerie: flexible file-system interfaces to storage-class memory. EuroSys 2014: 14:1-14:14 - 2013
- [c8]Haris Volos, Sankaralingam Panneerselvam, Sanketh Nalli, Michael M. Swift:
Storage-class memory needs flexible interfaces. APSys 2013: 11:1-11:7 - 2012
- [c7]Haris Volos, Andres Jaan Tack, Michael M. Swift, Shan Lu:
Applying transactional memory to concurrency bugs. ASPLOS 2012: 211-222 - 2011
- [c6]Haris Volos, Andres Jaan Tack, Michael M. Swift:
Mnemosyne: lightweight persistent memory. ASPLOS 2011: 91-104
2000 – 2009
- 2009
- [c5]Haris Volos, Adam Welc, Ali-Reza Adl-Tabatabai, Tatiana Shpeisman, Xinmin Tian, Ravi Narayanaswamy:
NePaLTM: Design and Implementation of Nested Parallelism for Transactional Memory Systems. ECOOP 2009: 123-147 - [c4]Haris Volos, Andres Jaan Tack, Neelam Goyal, Michael M. Swift, Adam Welc:
xCalls: safe I/O in memory transactions. EuroSys 2009: 247-260 - [c3]Haris Volos, Adam Welc, Ali-Reza Adl-Tabatabai, Tatiana Shpeisman, Xinmin Tian, Ravi Narayanaswamy:
NePalTM: design and implementation of nested parallelism for transactional memory systems. PPoPP 2009: 291-292 - 2008
- [j1]Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Yen, Mark D. Hill, Michael M. Swift, David A. Wood:
Performance Pathologies in Hardware Transactional Memory. IEEE Micro 28(1): 32-41 (2008) - 2007
- [c2]Luke Yen, Jayaram Bobba, Michael R. Marty, Kevin E. Moore, Haris Volos, Mark D. Hill, Michael M. Swift, David A. Wood:
LogTM-SE: Decoupling Hardware Transactional Memory from Caches. HPCA 2007: 261-272 - [c1]Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Yen, Mark D. Hill, Michael M. Swift, David A. Wood:
Performance pathologies in hardware transactional memory. ISCA 2007: 81-91 - [i1]Mark D. Hill, Derek Hower, Kevin E. Moore, Michael M. Swift, Haris Volos, David A. Wood:
A Case for Deconstructing Hardware Transactional Memory Systems. Programming Models for Ubiquitous Parallelism 2007
Coauthor Index
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