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ORCIDTaehee Lee 0003
Person information
- affiliation (PhD 2017): Sungkyunkwan University, Department of Semiconductor and Display Engineering, Suwon, South Korea
- affiliation (former): University of Southern California, Los Angeles, CA, USA
Other persons with the same name
- Taehee Lee (aka: TaeHee Lee, Tae-Hee Lee) — disambiguation page
- Taehee Lee 0001 — Carnegie Mellon University, Pittsburgh, PA, USA (and 1 more)
- Taehee Lee 0002 — University of California Santa Barbara, CA, USA
- Taehee Lee 0004 — Raon Expert Solutions Inc., Bundang, Korea
- Taehee Lee 0005 — Hanyang University, Seoul, South Korea
- Taehee Lee 0006
![[0000-0002-5936-762X]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-5936-762X")
— Brown University, Division of Applied Mathematics, RI, USA
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Journal Articles
- 2018
[j4]Taehee Lee, David Z. Pan, Joon-Sung Yang:
Clock Network Optimization With Multibit Flip-Flop Generation Considering Multicorner Multimode Timing Constraint. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(1): 245-256 (2018)- 2017
- [j3]Taehee Lee, Joon-Sung Yang:
Physical-aware gating element insertion for thermal-safe scan shift operation. IEICE Electron. Express 14(7): 20161181 (2017) - [j2]Taehee Lee, Nur A. Touba, Joon-Sung Yang:
Enhancing Test Compression With Dependency Analysis for Multiple Expansion Ratios. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(9): 1571-1579 (2017) - 2016
- [j1]Taehee Lee, YongJoon Kim, Joon-Sung Yang:
Temperature and voltage droop-aware test scheduling during scan shift operation. IEICE Electron. Express 13(18): 20160581 (2016)
Conference and Workshop Papers
- 2016
- [c1]Taehee Lee, JongWon Yi, Joon-Sung Yang:
Multi-bit flip-flop generation considering multi-corner multi-mode timing constraint. ISCAS 2016: 782-785
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