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ORCIDSiddhartha 0003
Person information
- affiliation: University of Sydney, Australia
Other persons with the same name
- Siddhartha 0001
![[0000-0002-6721-3997]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-6721-3997")
— Advanced Micro Devices, Singapore (and 1 more) - Siddhartha 0002 — PricewaterhouseCoopers Pvt. Ltd., Mumbai, India
- Siddhartha 0004 — Indian Institute of Space Science and Technology, Trivandrum, India
- Siddhartha 0005 — Saarland University, Saarbrücken, Germany
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2020 – today
- 2020
[c5]Seyedramin Rasoulinezhad, Siddhartha, Hao Zhou, Lingli Wang, David Boland, Philip H. W. Leong:
LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations. FPGA 2020: 161-171- [c4]Stephen Tridgell, David Boland, Philip H. W. Leong, Ryan Kastner, Alireza Khodamoradi, Siddhartha:
Real-time Automatic Modulation Classification using RFSoC. IPDPS Workshops 2020: 82-89 - [i1]Seyedramin Rasoulinezhad, Siddhartha, Hao Zhou, Lingli Wang, David Boland, Philip H. W. Leong:
LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations. CoRR abs/2003.03043 (2020)
2010 – 2019
- 2019
- [c3]Stephen Tridgell, David Boland, Philip H. W. Leong, Siddhartha:
Real-Time Automatic Modulation Classification. FPT 2019: 299-302 - 2018
- [c2]Siddhartha, Steven J. E. Wilton, David Boland, Barry Flower, Perry Blackmore, Philip H. W. Leong:
Simultaneous Inference and Training Using On-FPGA Weight Perturbation Techniques. FPT 2018: 306-309 - [c1]Siddhartha, Yee Hui Lee, Duncan J. M. Moss, Julian Faraone, Perry Blackmore, Daniel Salmond, David Boland, Philip H. W. Leong:
Long Short-Term Memory for Radio Frequency Spectral Prediction and its Real-Time FPGA Implementation. MILCOM 2018: 1-9
Coauthor Index
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