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ORCIDPeng Yin 0004
Person information
- affiliation: Chongqing University, CQU, School of Microelectronics and Communication Engineering, China
Other persons with the same name
- Peng Yin — disambiguation page
- Peng Yin 0001
![[0000-0001-8398-0988]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0001-8398-0988")
— Carnegie Mellon University, Robotics Institute, Pittsburgh, PA, USA (and 2 more) - Peng Yin 0002 — Dolby Laboratories, Inc., Sunnyvale, CA, USA (and 2 more)
- Peng Yin 0003 — Duke University, Department of Computer Science, Durham, NC, USA
- Peng Yin 0005 — University of Chinese Academy of Sciences, Defence Industry Secrecy Examination and Certification Center, Beijing, China
- Peng Yin 0006 — Chinese Academy of Sciences, Guangdong-Hong Kong-Macao Joint Laboratory of Human-Machine Intelligence-Synergy Systems, Shenzhen, China
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2020 – today
- 2024
[j10]Junpeng Gao, Jihua Zhou, Tao Zhao, Chen Yi, Baoze Ma, Peng Yin:
Robust transmission for multi-user OFDM-based IRS-assisted cognitive radio networks. Digit. Signal Process. 145: 104348 (2024)- [j9]Yingjun Xia, Jianjiang Luo, Peng Yin, Dengwei Yan, Xichuan Zhou, Amine Bermak, Fang Tang:
Theory and Low-Power Design of Moving Accumulative Sign Filter. IEEE Trans. Circuits Syst. I Regul. Pap. 71(6): 2511-2524 (2024) - [j8]Peng Yin, Hongli Chen, Yingjun Xia, Jinlong Zhang, Mingguo Liu, Cheng Gu, Weizhou Hou, Amine Bermak, Fang Tang:
High Logic Density Cyclic Redundancy Check and Forward Error Correction Logic Sharing Encoding Circuit for JESD204C Controller. IEEE Trans. Circuits Syst. I Regul. Pap. 71(11): 5166-5177 (2024) - 2023
- [j7]Qiushi Wang, Peng Yin, Nairiga Wu, Amine Bermak, Fang Tang:
A High-Logic-Density, Low-Power Control Character Detection and Identification Circuit for the JESD204B Data Link Layer. IEEE Trans. Circuits Syst. II Express Briefs 70(4): 1600-1604 (2023) - 2022
- [j6]Peng Yin, Zhongjie Wang, Yingjun Xia, Xiaoping Zeng, Fang Tang:
A Low-Area Low-Power Column-parallel Digital Decimation Filter Using 1-Bit Pre-BWI Topology for CMOS Image Sensor in 40-nm CMOS Process. Circuits Syst. Signal Process. 41(5): 2681-2698 (2022) - [j5]Xin Lei, Junan Zhang, Jun Deng, Peng Yin, Zhou Shu, Fang Tang:
An Automatic Clock-Induced-Spurs Detector Based on Energy Detection for Direct Digital Frequency Synthesizer. Sensors 22(9): 3396 (2022) - [j4]Shalin Huang, Mingdong Li, Huan Li, Peng Yin, Zhou Shu, Amine Bermak, Fang Tang:
A Sub-1/°C Bandgap Voltage Reference With High-Order Temperature Compensation in 0.18-μm CMOS Process. IEEE Trans. Circuits Syst. I Regul. Pap. 69(4): 1408-1416 (2022) - 2021
- [j3]Peng Yin, Zhou Shu, Yingjun Xia, Tianmei Shen, Xiao Guan, Xiaoqin Wang, Umar Mohammad, Jiandong Zang, Dongbing Fu, Xiaoping Zeng, Fang Tang, Amine Bermak:
A Low-Area and Low-Power Comma Detection and Word Alignment Circuits for JESD204B/C Controller. IEEE Trans. Circuits Syst. I Regul. Pap. 68(7): 2925-2935 (2021) - [j2]Jun Deng, Peng Yin, Xin Lei, Zhou Shu, Ming-Chun Tang, Fang Tang:
A Tunable Parameter, High Linearity Time-to-Digital Converter Implemented in 28-nm FPGA. IEEE Trans. Instrum. Meas. 70: 1-12 (2021) - 2020
- [j1]Zhou Shu, Shalin Huang, Zhipeng Li, Peng Yin, Jiandong Zang, Dongbing Fu, Fang Tang, Amine Bermak:
A 5-13.5 Gb/s Multistandard Receiver With High Jitter Tolerance Digital CDR in 40-nm CMOS Process. IEEE Trans. Circuits Syst. 67-I(10): 3378-3388 (2020)
Coauthor Index
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