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Morteza Rezaalipour
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2020 – today
- 2024
- [j6]Morteza Amouzegar, Morteza Rezaalipour, Masoud Dehyadegari:
Genetic Cache: A Machine Learning Approach to Designing DRAM Cache Controllers in HBM Systems. ACM J. Emerg. Technol. Comput. Syst. 20(3): 11:1-11:24 (2024) - [j5]Sina Shah Oveisi, Hoda Roodaki, Morteza Rezaalipour, Masoud Dehyadegari:
A power-efficient approximate approach to improve the computational complexity of coding tools in versatile video coding. Multim. Tools Appl. 83(28): 71071-71087 (2024) - 2023
- [c5]Morteza Rezaalipour, Lorenzo Ferretti, Ilaria Scarabottolo, George A. Constantinides, Laura Pozzi:
ErrorEval: an Open-Source Worst-Case-Error Evaluation Framework for Approximate Computing. CF 2023: 393-394 - [c4]Morteza Rezaalipour, Marco Biasion, Ilaria Scarabottolo, George A. Constantinides, Laura Pozzi:
A Parametrizable Template for Approximate Logic Synthesis. DSN-W 2023: 175-178 - [c3]Morteza Rezaalipour, Lorenzo Ferretti, Ilaria Scarabottolo, George A. Constantinides, Laura Pozzi:
Multi-Metric SMT-Based Evaluation of Worst-Case-Error for Approximate Circuits. DSN-W 2023: 199-202 - 2021
- [j4]Morteza Rezaalipour, Masoud Dehyadegari:
Linear-time error calculation for approximate adders. Comput. Electr. Eng. 92: 107139 (2021) - [c2]Ananth Krishna Prasad, Morteza Rezaalipour, Masoud Dehyadegari, Mahdi Nazm Bojnordi:
Memristive Data Ranking. HPCA 2021: 440-452 - 2020
- [j3]Morteza Rezaalipour, Mohammad Rezaalipour, Masoud Dehyadegari, Mahdi Nazm Bojnordi:
AxMAP: Making Approximate Adders Aware of Input Patterns. IEEE Trans. Computers 69(6): 868-882 (2020)
2010 – 2019
- 2019
- [j2]Sarvenaz Tajasob, Morteza Rezaalipour, Masoud Dehyadegari:
Designing energy-efficient imprecise adders with multi-bit approximation. Microelectron. J. 89: 41-55 (2019) - [j1]Morteza Rezaalipour, Mohammad Rezaalipour, Sarvenaz Tajasob, Masoud Dehyadegari:
IDrAx: A tool-chain for designing efficient approximate adders. Microelectron. J. 90: 222-231 (2019) - 2018
- [c1]Sarvenaz Tajasob, Morteza Rezaalipour, Masoud Dehyadegari, Mahdi Nazm Bojnordi:
Designing Efficient Imprecise Adders using Multi-bit Approximate Building Blocks. ISLPED 2018: 13:1-13:6
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last updated on 2024-10-07 22:06 CEST by the dblp team
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