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ORCIDShogo Mochizuki
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2020 – today
- 2024
[c4]Shogo Mochizuki, Koji Iwanuma:
A Space-Saving Algorithm for Enumerating Minimal Generators in Negative Rule Mining. IIAI-AAI 2024: 689-692- [c3]Ruilong Xie, Wonhyuk Hong, Chen Zhang, Jongjin Lee, Kevin Brew, Richard Johnson, Nicholas A. Lanzillo, Hosadurga Shobha, Taesun Kim, Panjae Park, Shogo Mochizuki, Iqbal Saraf, Chanro Park, Lei Zhuang, Clifford Osborn, Wai Kin Li, Feng Liu, Muthumanickam Sankarapandian, Chung Ju Yang, Juntao Li, Lukas Tierney, Ruturaj Pujari, Yasir Sulehria, Yuncheng Song, Huimei Zhou, Miaomiao Wang, Michael Belyansky, Somnath Ghosh, Haojun Zhang, Koichi Motoyama, Debarghya Sarkar, Wukang Kim, Albert Chu, Tao Li, Fabio Carta, Oleg Gluschenkov, Joongsuk Oh, Matthew Malley, Pinlei Chu, Son Nguyen, Katherine Luedders, Joe Lee, Shahrukh Khan, Prabudhya Roy Chowdhury, Huai Huang, Abir Shadman, Stuart Sieg, Daniel Dechene, Daniel Edelstein, John Arnold, Tenko Yamashita, Kisik Choi, Kang-ill Seo, Dechao Guo, Huiming Bu:
Backside Power Distribution for Nanosheet Technologies Beyond 2nm. VLSI Technology and Circuits 2024: 1-2 - 2020
- [c2]Huimei Zhou, Miaomiao Wang, Jingyun Zhang, Koji Watanabe, Curtis Durfee, Shogo Mochizuki, Ruqiang Bao, Richard G. Southwick, Maruf Bhuiyan, Basker Veeraraghavan:
NBTI Impact of Surface Orientation in Stacked Gate-All-Around Nanosheet Transistor. IRPS 2020: 1-6
2010 – 2019
- 2017
- [c1]ChoongHyun Lee, Richard G. Southwick, Shogo Mochizuki, Paul Jamison, Ruqiang Bao, Rajan Pandey
, Aniruddha Konar, Takashi Ando, Vijay Narayanan, Bala Haran, Hemanth Jagannathan:
Interface engineering of Si1-xGex gate stacks for high performance dual channel CMOS. ASICON 2017: 573-576
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