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ORCIDBlaise-Pascal Tine
Person information
- affiliation: UCLA, CA, USA
- affiliation (PhD 2024): Georgia Institute of Technology, GA, USA
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2020 – today
- 2024
[b1]Blaise Tine:
Vertical Integration in Open-Source Hardware-Software Co-Design for Accelerator Architecture Research. Georgia Institute of Technology, Atlanta, GA, USA, 2024- 2023
- [c8]Blaise Tine, Varun Saxena, Santosh Srivatsan, Joshua R. Simpson, Fadi Alzammar, Liam Cooper, Hyesoon Kim:
Skybox: Open-Source Graphic Rendering on Programmable RISC-V GPUs. ASPLOS (3) 2023: 616-630 - 2022
- [c7]Blaise Tine, Varun Saxena, Santosh Srivatsan, Joshua R. Simpson, Fadi Alzammar, Liam Paul Cooper, Sam Jijina
, Swetha Rajagoplan, Tejaswini Anand Kumar, Jeffrey Young, Hyesoon Kim:
Accelerating Graphic Rendering on Programmable RISC-V GPUs. HCS 2022: 1-15 - 2021
- [c6]Blaise Tine, Krishna Praveen Yalamarthy, Fares Elsabbagh, Hyesoon Kim:
Vortex: Extending the RISC-V ISA for GPGPU and 3D-Graphics. MICRO 2021: 754-766 - [i3]Ruobing Han, Blaise Tine, Jaewon Lee, Jaewoong Sim, Hyesoon Kim:
Supporting CUDA for an extended RISC-V GPU architecture. CoRR abs/2109.00673 (2021) - [i2]Blaise Tine, Fares Elsabbagh, Krishna Praveen Yalamarthy, Hyesoon Kim:
Vortex: Extending the RISC-V ISA for GPGPU and 3D-GraphicsResearch. CoRR abs/2110.10857 (2021) - 2020
- [c5]Blaise-Pascal Tine, Sudhakar Yalamanchili, Hyesoon Kim:
Tango: An Optimizing Compiler for Just-In-Time RTL Simulation. DATE 2020: 157-162 - [c4]Blaise Tine, Seyong Lee, Jeffrey S. Vetter, Hyesoon Kim:
Productive Hardware Designs using Hybrid HLS-RTL Development. FPGA 2020: 311 - [c3]Blaise Tine, Fares Elsabbagh, Seyong Lee, Jeffrey S. Vetter, Hyesoon Kim:
Cash: A Single-Source Hardware-Software Codesign Framework for Rapid Prototyping. FPGA 2020: 321 - [i1]Fares Elsabbagh, Blaise Tine, Priyadarshini Roshan, Ethan Lyons, Euna Kim, Da Eun Shim, Lingjun Zhu, Sung Kyu Lim, Hyesoon Kim:
Vortex: OpenCL Compatible RISC-V GPGPU. CoRR abs/2002.12151 (2020)
2010 – 2019
- 2019
- [c2]Blaise-Pascal Tine, Sudhakar Yalamanchili, Hyesoon Kim, Jeffrey S. Vetter:
POSTER: Tango: An Optimizing Compiler for Just-In-Time RTL Simulation. PACT 2019: 481-482 - 2017
- [c1]Blaise-Pascal Tine, Sudhakar Yalamanchili:
Pagevault: securing off-chip memory using page-based authentication. MEMSYS 2017: 293-304
Coauthor Index
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