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John Niroula
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2020 – today
- 2024
- [c6]John Niroula, Matthew A. Taylor, Qingyun Xie, Pradyot Yadav, Shisong Luo, Yuji Zhao, Tomás Palacios:
Record High Temperature Performance in Scaled AlGaN/GaN-on-Si HEMTs up to 500°C. DRC 2024: 1-2 - 2023
- [c5]Pradyot Yadav, Qingyun Xie, John Niroula, Gillian K. Micale, Hridibrata Pal, Tomás Palacios:
First Demonstration of GaN RF HEMTs on Engineered Substrate. DRC 2023: 1-2 - [c4]Qingyun Xie, Mengyang Yuan, John Niroula, Bejoy Sikder, Shisong Luo, Kai Fu, Nitul S. Rajput, Ayan Biswas Pranta, Pradyot Yadav, Yuji Zhao, Nadim Chowdhury, Tomás Palacios:
Towards DTCO in High Temperature GaN-on-Si Technology: Arithmetic Logic Unit at 300 °C and CAD Framework up to 500 °C. VLSI Technology and Circuits 2023: 1-2 - 2020
- [c3]Ahmad Zubair, John Niroula, Nadim Chowdhury, Yuhao Zhang, Jori Lemettinen, Tomás Palacios:
Materials and Technology Issues for the Next Generation of Power Electronic Devices. DRC 2020: 1-2 - [c2]Ahmad Zubair, Joshua A. Perozek, John Niroula, O. Aktas, V. Odnoblyudov, Tomás Palacios:
First Demonstration of GaN Vertical Power FinFETs on Engineered Substrate. DRC 2020: 1-2
2010 – 2019
- 2019
- [i2]Sapan Agarwal, Diana Garland, John Niroula, Robin B. Jacobs-Gedrim, Alexander H. Hsia, Michael S. van Heukelom, Elliot J. Fuller, Bruce Draper, Matthew J. Marinella:
Using Floating Gate Memory to Train Ideal Accuracy Neural Networks. CoRR abs/1901.10570 (2019) - 2018
- [j1]Matthew J. Marinella, Sapan Agarwal, Alexander H. Hsia, Isaac Richter, Robin Jacobs-Gedrim, John Niroula, Steven J. Plimpton, Engin Ipek, Conrad D. James:
Multiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a ReRAM Analog Neural Training Accelerator. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(1): 86-101 (2018) - 2017
- [c1]Robin B. Jacobs-Gedrim, Sapan Agarwal, Kathrine E. Knisely, Jim E. Stevens, Michael S. van Heukelom, David R. Hughart, John Niroula, Conrad D. James, Matthew J. Marinella:
Impact of Linearity and Write Noise of Analog Resistive Memory Devices in a Neural Algorithm Accelerator. ICRC 2017: 1-10 - [i1]Matthew J. Marinella, Sapan Agarwal, Alexander H. Hsia, Isaac Richter, Robin Jacobs-Gedrim, John Niroula, Steven J. Plimpton, Engin Ipek, Conrad D. James:
Multiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a ReRAM Analog Neural Training Accelerator. CoRR abs/1707.09952 (2017)
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