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2020 – today
- 2022
[c2]Giyoung Yang
, Hakchul Jung, Jinyoung Lim, Jaewoo Seo, Ingyum Kim, Jisu Yu, Hyeoungyu You, Jeongsoon Kong, Garoom Kim, Minjae Jeong, Chanhee Park, Sera An, Woojin Rim, Hayoung Kim, Dalhee Lee, Sanghoon Baek, Jonghoon Jung, Taejoong Song, Jongwook Kye:
Standard Cell Design Optimization with Advanced MOL Technology in 3nm GAA Process. VLSI Technology and Circuits 2022: 363-364
2010 – 2019
- 2017
- [c1]Taejoong Song, Hoonki Kim, Woojin Rim, Yongho Kim, Sunghyun Park, Changnam Park, Minsun Hong, Giyong Yang, Jeongho Do, Jinyoung Lim, Seungyoung Lee, Ingyum Kim, Sanghoon Baek, Jonghoon Jung, Daewon Ha, Hyungsoon Jang, Taejung Lee, Chul-Hong Park, Bongjae Kwon, Hyuntaek Jung, Sungwee Cho, Yongjae Choo, Jaeseung Choi:
12.2 A 7nm FinFET SRAM macro using EUV lithography for peripheral repair analysis. ISSCC 2017: 208-209
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last updated on 2024-10-07 22:24 CEST by the dblp team
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