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2020 – today
- 2024
[c7]K. Morimoto, N. Isoda, H. Sekine, Tomoya Sasago, Y. Maehashi, S. Mikajiri, Kenzo Tojima, M. Shinohara, A. Abdelghafar, Hiroyuki Tsuchiya, K. Inoue, S. Omodani, K. Chida, A. Ehara, J. Iwata, T. Itano, Yasushi Matsuno, K. Sakurai, T. Ichikawa:
3D-Stacked 1Megapixel Time-Gated SPAD Image Sensor with 2D Interactive Gating Network for Image Alignment-Free Sensor Fusion. VLSI Technology and Circuits 2024: 1-2- 2022
- [c6]Yasuharu Ota, Kazuhiro Morimoto, Tomoya Sasago, Mahito Shinohara, Yukihiro Kuroda, Wataru Endo, Yu Maehashi, Shintaro Maekawa, Hiroyuki Tsuchiya, Aymantarek Abdelahafar, Shingo Hikosaka, Masanao Motoyama, Kenzo Tojima, Kosei Uehira, Junji Iwata, Fumihiro Inui, Yasushi Matsuno, Katsuhito Sakurai, Takeshi Ichikawa:
A 0.37W 143dB-Dynamic-Range 1Mpixel Backside-Illuminated Charge-Focusing SPAD Image Sensor with Pixel-Wise Exposure Control and Adaptive Clocked Recharging. ISSCC 2022: 94-96
2010 – 2019
- 2017
- [c5]Yuki Watanabe, Hayato Narita, Hiroyuki Tsuchiya, Tatsuji Matsuura, Hao San
, Masao Hotta:
A 14bit 80kSPS non-binary cyclic ADC without high accuracy analog components. ASP-DAC 2017: 15-16 - [c4]Hiroyuki Tsuchiya, Asato Uchiyama, Yuta Misima, Yuki Watanabe, Tatsuji Matsuura, Hao San, Masao Hotta:
Non-binary cyclic ADC with correlated level shifting technique. ASP-DAC 2017: 17-18 - [c3]Koken Chin, Yuta Mishima, Yuki Watanabe, Hiroyuki Tsuchiya, Hao San, Tatsuji Matsuura, Masao Hotta:
A 12-Bit 3.3MS/S pipeline cyclic ADC with correlated level shifting technique. ISPACS 2017: 602-605 - [c2]Hiroyuki Tsuchiya, Yuki Watanabe, Koken Chin, Hao San, Tatsuji Matsuura, Masao Hotta:
The design of a 14-bit 400kSPS non-binary pipeline cyclic ADC. ISPACS 2017: 606-610 - [c1]Yuki Watanabe, Koken Chin, Hiroyuki Tsuchiya, Hao San, Tatsuji Matsuura, Masao Hotta:
Experimental results of reconfigurable non-binary cyclic ADC. ISPACS 2017: 611-615
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