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Ritesh Bhat
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2020 – today
- 2023
- [j4]Abhishek Agrawal, Amy Whitcombe, Woorim Shin, Ritesh Bhat, Somnath Kundu, Peter Sagazio, Hariprasad Chandrakumar, Thomas William Brown, Brent R. Carlton, Christopher Dennis Hull, Steven Callender, Stefano Pellerano:
A 128-Gb/s D-Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b Efficiency in 22-nm FinFET. IEEE J. Solid State Circuits 58(12): 3364-3379 (2023) - [c4]Abhishek Agrawal, Amy Whitcombe, Woorim Shin, Ritesh Bhat, Somnath Kundu, Peter Sagazio, Hariprasad Chandrakumar, Thomas William Brown, Brent R. Carlton, Christopher D. Hull, Steven Callender, Stefano Pellerano:
A 128Gb/s 1.95pJ/b D-Band Receiver with Integrated PLL and ADC in 22nm FinFET. ISSCC 2023: 284-285 - 2022
- [j3]Steven Callender, Abhishek Agrawal, Amy Whitcombe, Ritesh Bhat, Mustafijur Rahman, Chun C. Lee, Peter Sagazio, Georgios C. Dogiamis, Brent R. Carlton, Christopher D. Hull, Stefano Pellerano:
A Fully Integrated 160-Gb/s D-Band Transmitter Achieving 1.1-pJ/b Efficiency in 22-nm FinFET. IEEE J. Solid State Circuits 57(12): 3582-3598 (2022) - [c3]Dasharathraj K. Shetty, Gayathri Prerepa, Nithesh Naik, Ritesh Bhat, Jayant Sharma, Parva Mehrotra:
Revolutionizing Aerospace and Defense: The Impact of AI and Robotics on Modern Warfare. ICIMMI 2022: 19:1-19:8 - [c2]Steven Callender, Amy Whitcombe, Abhishek Agrawal, Ritesh Bhat, Mustafijur Rahman, Chun C. Lee, Peter Sagazio, Georgios C. Dogiamis, Brent R. Carlton, Mark Chakravorti, Stefano Pellerano, Christopher D. Hull:
A Fully Integrated 160Gb/s D-Band Transmitter with 1.1 pJ/b Efficiency in 22nm FinFET Technology. ISSCC 2022: 78-80
2010 – 2019
- 2017
- [j2]Ritesh Bhat, Jin Zhou, Harish Krishnaswamy:
Wideband Mixed-Domain Multi-Tap Finite-Impulse Response Filtering of Out-of-Band Noise Floor in Watt-Class Digital Transmitters. IEEE J. Solid State Circuits 52(12): 3405-3420 (2017) - [c1]Ritesh Bhat, Jin Zhou, Harish Krishnaswamy:
13.10 A >1W 2.2GHz switched-capacitor digital power amplifier with wideband mixed-domain multi-tap FIR filtering of OOB noise floor. ISSCC 2017: 234-235 - 2016
- [j1]Ritesh Bhat, Harish Krishnaswamy:
Design Tradeoffs and Predistortion of Digital Cartesian RF-Power-DAC Transmitters. IEEE Trans. Circuits Syst. II Express Briefs 63-II(11): 1039-1043 (2016)
Coauthor Index
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