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Kore Sagar Dattatraya

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2016
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Kore Sagar Dattatraya, Ritesh Belgudri, Ramdas Bhanudas Khaladkar, V. S. Kanchana Bhaaskaran:
Low Power, High Speed and Area Efficient Binary Count Multiplier. J. Circuits Syst. Comput. 25(4): 1650027:1-1650027:17 (2016)

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