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ORCIDNobuhiko Nakano
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- affiliation: Keio University, Minato, Tokyo, Japan
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2020 – today
- 2023
[j3]Takaya Sugiura
, Shiun Yamakiri, Nobuhiko Nakano:
Germanium- and Silicon-Nanotransistor Designs by Electrical and Thermal Self-Consistent Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(10): 3365-3373 (2023)- [j2]Takaya Sugiura, Hiroki Miura, Nobuhiko Nakano:
High-Temperature Operational Piezoresistive Pressure Sensor on Standard CMOS Process. IEEE Trans. Circuits Syst. II Express Briefs 70(2): 726-730 (2023) - 2021
- [c9]Shusuke Nakazato, Nobuhiko Nakano:
Speech Signal Processing Using Consonant-Vowel Location Detection. CANDAR (Workshops) 2021: 301-304 - 2020
- [c8]Jorge Cañada, Yui Yoshida, Hiroki Miura, Nobuhiko Nakano:
An On-Chip Self-Powered Non-Volatile One-Time-Programmable Memory System in Standard CMOS Technology. ICECS 2020: 1-4 - [c7]Mikiyoshi Mikawa, Kenta Yagi, Kazuki Itakura, Leo Onuki, Nobuhiko Nakano:
A Low-Power Multi-Frequency Chopper-Stabilized Readout with Time-Domain Delta-Sigma Modulator Suitable for Neural Recording. ICECS 2020: 1-4 - [c6]Jorge Cañada, Yui Yoshida, Hiroki Miura, Nobuhiko Nakano:
An On-Chip Scalable Low Power Consumption High-Voltage Driver Based on Standard CMOS Technology. ISOCC 2020: 17-18
2010 – 2019
- 2019
- [c5]Mikiyoshi Mikawa, Shohei Kawazoe, Ryuto Fukuoka, Nobuhiko Nakano:
A Delta-Sigma Modulator With Frequency Division Multiplexing for Multi-Channel EEG Acquisition Front-end. ICECS 2019: 97-100 - 2018
- [c4]Takumi Deguchi, Ryoya Tanaka, Shohei Kawazoe, Ryuto Fukuoka, Nobuhiko Nakano:
A Low Noise Analog Front-end Design with an N-path Filter for Dry EEG Recording. ISPACS 2018: 523-526 - 2016
- [j1]Hiroki Yotsuda, Retdian Agung Nicodimus, Masahiro Kubo, Taro Kosaka, Nobuhiko Nakano:
Compensation Technique for Current-to-Voltage Converters for LSI Patch Clamp System Using High Resistive Feedback. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(2): 531-539 (2016) - [c3]Masahiro Kubo, Taro Kosaka, Takanori Miyawaki, Kota Ito, Nobuhiko Nakano:
Valiable frequency characteristics multi-channel on-chip patch-clamp system using 0.18 um CMOS technology. ISPACS 2016: 1-5 - [c2]Yoshimasa Minami, Kazuma Igarashi, Takaya Sugiura, Nobuhiko Nakano:
Area-efficient cross-coupled charge pump for on-chip solar cell. ISPACS 2016: 1-6 - 2015
- [c1]Masahiro Kubo, Hiroki Yotsuda, Taro Kosaka, Nobuhiko Nakano:
A design of Transimpedance Amplifier using OTA as a feedback resistor for patch-clamp measurement system. ISPACS 2015: 307-311
Coauthor Index
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