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Chihiro Matsui
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Journal Articles
- 2024
- [j16]Ayumu Yamada, Zhiyuan Huang, Naoko Misawa, Chihiro Matsui, Ken Takeuchi:
Comprehensive Analysis of Read Fluctuations in ReRAM CiM by Using Fluctuation Pattern Classifier. IEICE Trans. Electron. 107(10): 416-425 (2024) - [j15]Yuya Ichikawa, Ayumu Yamada, Naoko Misawa, Chihiro Matsui, Ken Takeuchi:
REM-CiM: Attentional RGB-Event Fusion Multi-Modal Analog CiM for Area/Energy-Efficient Edge Object Detection during Both Day and Night. IEICE Trans. Electron. 107(10): 426-435 (2024) - [j14]Fuyuki Kihara, Chihiro Matsui, Ken Takeuchi:
3D Parallel ReRAM Computation-in-Memory for Hyperdimensional Computing. IEICE Trans. Electron. 107(10): 436-439 (2024) - [j13]Chihiro Matsui, Kasidit Toprasertpong, Shinichi Takagi, Ken Takeuchi:
FeFET Local Multiply and Global Accumulate Voltage-Sensing Computation-In-Memory Circuit Design for Neuromorphic Computing. IEEE Trans. Very Large Scale Integr. Syst. 32(3): 468-479 (2024) - 2023
- [j12]Chihiro Matsui, Ken Takeuchi:
Heterogeneous Integration of Precise and Approximate Storage for Error-Tolerant Workloads. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 106(3): 491-503 (2023) - [j11]Shinsei Yoshikiyo, Naoko Misawa, Kasidit Toprasertpong, Shinichi Takagi, Chihiro Matsui, Ken Takeuchi:
Write Variation & Reliability Error Compensation by Layer-Wise Tunable Retraining of Edge FeFET LM-GA CiM. IEICE Trans. Electron. 106(7): 352-364 (2023) - 2020
- [j10]Mamoru Fukuchi, Chihiro Matsui, Ken Takeuchi:
System Performance Comparison of 3D Charge-Trap TLC NAND Flash and 2D Floating-Gate MLC NAND Flash Based SSDs. IEICE Trans. Electron. 103-C(4): 161-170 (2020) - [j9]Yoshiki Takai, Mamoru Fukuchi, Chihiro Matsui, Reika Kinoshita, Ken Takeuchi:
Analysis on Hybrid SSD Configuration with Emerging Non-Volatile Memories Including Quadruple-Level Cell (QLC) NAND Flash Memory and Various Types of Storage Class Memories (SCMs). IEICE Trans. Electron. 103-C(4): 171-180 (2020) - 2019
- [j8]Chihiro Matsui, Ken Takeuchi:
Step-by-Step Design of memory hierarchy for heterogeneously-integrated SCM/NAND flash storage. Integr. 69: 62-74 (2019) - [j7]Chihiro Matsui, Ken Takeuchi:
Dynamic Adjustment of Storage Class Memory Capacity in Memory-Resource Disaggregated Hybrid Storage With SCM and NAND Flash Memory. IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1799-1810 (2019) - 2018
- [j6]Yusuke Yamaga, Chihiro Matsui, Yukiya Sakaki, Ken Takeuchi:
Reliability Analysis of Scaled NAND Flash Memory Based SSDs with Real Workload Characteristics by Using Real Usage-Based Precise Reliability Test. IEICE Trans. Electron. 101-C(4): 243-252 (2018) - [j5]Hirofumi Takishita, Yutaka Adachi, Chihiro Matsui, Ken Takeuchi:
Analysis of SCM-Based SSD Performance in Consideration of SCM Access Unit Size, Write/Read Latencies and Application Request Size. IEICE Trans. Electron. 101-C(4): 253-262 (2018) - 2017
- [j4]Tomoaki Yamada, Chihiro Matsui, Ken Takeuchi:
Workload-Based Co-Design of Non-Volatile Cache Algorithm and Storage Class Memory Specifications for Storage Class Memory/NAND Flash Hybrid SSDs. IEICE Trans. Electron. 100-C(4): 373-381 (2017) - [j3]Chihiro Matsui, Chao Sun, Ken Takeuchi:
Design of Hybrid SSDs With Storage Class Memory and NAND Flash Memory. Proc. IEEE 105(9): 1812-1821 (2017) - [j2]Chihiro Matsui, Asuka Arakawa, Chao Sun, Ken Takeuchi:
Write Order-Based Garbage Collection Scheme for an LBA Scrambler Integrated SSD. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 510-519 (2017) - 2016
- [j1]Chao Sun, Ayumi Soga, Chihiro Matsui, Asuka Arakawa, Ken Takeuchi:
LBA Scrambler: A NAND Flash Aware Data Management Scheme for High-Performance Solid-State Drives. IEEE Trans. Very Large Scale Integr. Syst. 24(1): 115-128 (2016)
Conference and Workshop Papers
- 2024
- [c22]Naoko Misawa, Tao Wang, Chihiro Matsui, Ken Takeuchi:
Embedded Transformer Hetero-CiM: SRAM CiM for 4b Read/Write-MAC Self-attention and MLC ReRAM CiM for 6b Read-MAC Linear&FC Layers. IMW 2024: 1-4 - 2023
- [c21]Ayumu Yamada, Naoko Misawa, Chihiro Matsui, Ken Takeuchi:
LIORAT: NN Layer I/O Range Training for Area/Energy-Efficient Low-Bit A/D Conversion System Design in Error-Tolerant Computation-in-Memory. ICCAD 2023: 1-9 - [c20]Takuto Nishimura, Yuya Ichikawa, Akira Goda, Naoko Misawa, Chihiro Matsui, Ken Takeuchi:
Stochastic Computing-based Computation-in-Memory (SC CiM) Architecture for DNNs and Hierarchical Evaluations of Non-volatile Memory Error and Defect Tolerance. IMW 2023: 1-4 - [c19]Ayumu Yamada, Naoko Misawa, Chihiro Matsui, Ken Takeuchi:
ReRAM CiM Fluctuation Pattern Classification by CNN Trained on Artificially Created Dataset. IRPS 2023: 1-6 - 2022
- [c18]Yuya Ichikawa, Akira Goda, Chihiro Matsui, Ken Takeuchi:
Non-volatile Memory Application to Quantum Error Correction with Non-uniformly Quantized CiM. IMW 2022: 1-4 - [c17]Shinsei Yoshikiyo, Naoko Misawa, Kasidit Toprasertpong, Shinichi Takagi, Chihiro Matsui, Ken Takeuchi:
Edge Retraining of FeFET LM-GA CiM for Write Variation & Reliability Error Compensation. IMW 2022: 1-4 - [c16]Shinsei Yoshikiyo, Naoko Misawa, Chihiro Matsui, Ken Takeuchi:
Edge Computation-in-Memory for In-situ Class-incremental Learning with Knowledge Distillation. ISCAS 2022: 2953-2957 - [c15]Naoko Misawa, Kenta Taoka, Chihiro Matsui, Ken Takeuchi:
Domain Specific ReRAM Computation-in-Memory Design Considering Bit Precision and Memory Errors for Simulated Annealing. ISCAS 2022: 3289-3293 - [c14]Chihiro Matsui, Eitaro Kobayashi, Kasidit Toprasertpong, Shinichi Takagi, Ken Takeuchi:
Versatile FeFET Voltage-sensing Analog CiM for Fast & Small-area Hyperdimensional Computing. ISCAS 2022: 3403-3407 - 2021
- [c13]Kenta Taoka, Naoko Misawa, Shunsuke Koshino, Chihiro Matsui, Ken Takeuchi:
Simulated Annealing Algorithm & ReRAM Device Co-optimization for Computation-in-Memory. IMW 2021: 1-4 - [c12]Mamoru Fukuchi, Shun Suzuki, Kyosuke Maeda, Chihiro Matsui, Ken Takeuchi:
BER Evaluation System Considering Device Characteristics of TLC and QLC NAND Flash Memories in Hybrid SSDs with Real Storage Workloads. ISCAS 2021: 1-4 - [c11]Chihiro Matsui, Kasidit Toprasertpong, Shinichi Takagi, Ken Takeuchi:
Energy-Efficient Reliable HZO FeFET Computation-in-Memory with Local Multiply & Global Accumulate Array for Source-Follower & Charge-Sharing Voltage Sensing. VLSI Circuits 2021: 1-2 - 2020
- [c10]Reika Kinoshita, Chihiro Matsui, Atsuya Suzuki, Shouhei Fukuyama, Ken Takeuchi:
Workload-aware Data-eviction Self-adjusting System of Multi-SCM Storage to Resolve Trade-off between SCM Data-retention Error and Storage System Performance. ASP-DAC 2020: 319-324 - [c9]Yoshiki Kakuta, Reika Kinoshita, Hiroshi Kinoshita, Chihiro Matsui, Ken Takeuchi:
Real-time Error Monitoring System Considering Endurance and Data-retention Characteristics of TaOX-based ReRAM Storage with Workloads at Data Centers. VLSI-DAT 2020: 1-4 - 2019
- [c8]Chihiro Matsui, Ken Takeuchi:
Design of heterogeneously-integrated memory system with storage class memories and NAND flash memories. ASP-DAC 2019: 17-18 - [c7]Chihiro Matsui, Ken Takeuchi:
Self-Determining Resource Control in Multi-Tenant Data Center Storage with Future NV Memories. ISCAS 2019: 1-5 - 2018
- [c6]Mamoru Fukuchi, Yukiya Sakaki, Chihiro Matsui, Ken Takeuchi:
20% System-performance Gain of 3D Charge-trap TLC NAND Flash over 2D Floating-gate MLC NAND Flash for SCM/NAND Flash Hybrid SSD. ISCAS 2018: 1-5 - [c5]Chihiro Matsui, Ken Takeuchi:
3ASCA: Application-Aware Autonomous SCM Capacity Adjustment for SCM and NAND Flash Pooled Storage. ISCAS 2018: 1-5 - [c4]Reika Kinoshita, Chihiro Matsui, Shinpei Matsuda, Yutaka Adachi, Ken Takeuchi:
Maximizing Peformance/cost Figure of Merit of Storage-type SCM based SSD by Adding Small Capacity of Memory-type SCM. NVMTS 2018: 1-6 - [c3]Atsuya Suzuki, Chihiro Matsui, Ken Takeuchi:
Periodic Data Eviction Algorithm of SCM/NAND Flash Hybrid SSD with SCM Retention Time Constraint Capabilities at Extremely High Temperature. NVMTS 2018: 1-5 - [c2]Yutaka Adachi, Chihiro Matsui, Ken Takeuchi:
Double asymmetric-latency storage class memories (SCMs) for fast-write SCM, fast-read SCM & NAND flash hybrid SSDs. VLSI-DAT 2018: 1-4 - 2017
- [c1]Chihiro Matsui, Ken Takeuchi:
22% Higher performance, 2x SCM write endurance heterogeneous storage with dual storage class memory and NAND flash. ESSDERC 2017: 6-9
Coauthor Index
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