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William A. Geideman

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1990 – 1999

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1990
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William A. Geideman, Roger A. Niederland, David L. Harrington:
A 32-bit RISC CPU implemented in GaAs. Microprocessing and Microprogramming 30(1-5): 127-133 (1990)

1980 – 1989

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1987
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John H. Lane, Roger A. Niederland, Terrence L. Rasset, William A. Geideman:
GaAs implementation of a 32-bit RISC. Microprocess. Microprogramming 21(1-5): 31-38 (1987)
1986
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Terrence L. Rasset, Roger A. Niederland, John H. Lane, William A. Geideman:
A 32-bit RISC Implemented in Enhancement-Mode JFET GaAs. Computer 19(10): 60-68 (1986)

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