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2020 – today
- 2024
[j3]Zhenya Zhou
, Eva Caspari, Nicolás D. Barbosa, Klaus Holliger:
Normal and Shear Compliance Estimation for Inclined Fractures Using Full-Waveform Sonic Log Data. IEEE Trans. Geosci. Remote. Sens. 62: 1-15 (2024)- [c7]Zhou Jin, Tian Feng, Xiao Wu, Dan Niu, Zhenya Zhou, Cheng Zhuo:
MSH: A Multi-Stage HiZ-Aware Homotopy Framework for Nonlinear DC Analysis. DATE 2024: 1-6 - [c6]Yichao Dong, Dan Niu, Zhou Jin, Chuan Zhang, Changyin Sun, Zhenya Zhou:
ISPT-Net: A Noval Transient Backward-Stepping Reduction Policy by Irregular Sequential Prediction Transformer. DATE 2024: 1-6 - 2023
- [j2]Wenhui Yao, Chunxiong Zheng, Zhenya Zhou:
Error Analysis on the TICER Approximation. Circuits Syst. Signal Process. 42(7): 4390-4400 (2023) - [c5]Lingjie Li, Wenjian Yu, Genhua Guo, Zhenya Zhou:
More Efficient Accuracy-Ensured Waveform Compression for Circuit Simulation Supporting Asynchronous Waveforms. ACM Great Lakes Symposium on VLSI 2023: 305-311 - 2021
- [c4]Chen Dong, Limin Hao, Guoyong Shi, Zhenya Zhou, Minghou Cheng:
A Time Constant Estimation Method for Block RC Circuits with Application to Power Grid Analysis. ASICON 2021: 1-4 - [c3]Jianqi Zhao, Yao Wen, Yuchen Luo, Zhou Jin, Weifeng Liu, Zhenya Zhou:
SFLU: Synchronization-Free Sparse LU Factorization for Fast Circuit Simulation on GPUs. DAC 2021: 37-42 - [c2]Zhou Jin, Tian Feng, Yiru Duan, Xiao Wu, Minghou Cheng, Zhenya Zhou, Weifeng Liu:
PALBBD: A Parallel ArcLength Method Using Bordered Block Diagonal Form for DC Analysis. ACM Great Lakes Symposium on VLSI 2021: 327-332 - 2020
- [c1]Chen Zhao, Zhenya Zhou, Dake Wu:
Empyrean ALPS-GT: GPU-accelerated Analog Circuit Simulation. ICCAD 2020: 167:1-167:3
2010 – 2019
- 2015
- [j1]Xiao Li, Fan Yang, Dake Wu, Zhenya Zhou, Xuan Zeng:
MOS Table Models for Fast and Accurate Simulation of Analog and Mixed-Signal Circuits Using Efficient Oscillation-Diminishing Interpolations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(9): 1481-1494 (2015)
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