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ORCIDYohei Matsumoto
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2010 – 2019
- 2015
[c8]Yohei Matsumoto, Satoru Matsuzawa, Motomichi Toyama:
RMX: The Architecture Of Rule-based Mailing System. IDEAS 2015: 210-211- 2013
- [c7]Masakazu Hioki, Toshihiro Sekigawa, Tadashi Nakagawa, Hanpei Koike, Yohei Matsumoto, Takashi Kawanami, Toshiyuki Tsutsumi:
Fully-functional FPGA prototype with fine-grain programmable body biasing. FPGA 2013: 73-80 - 2011
- [c6]Jay Arre Toque, Yusuke Murayama, Yohei Matsumoto, Ari Ide-Ektessabi:
Polarized light scanning for cultural heritage investigation. Computer Vision and Image Analysis of Art 2011: 78690N - 2010
- [c5]Naoto Miyamoto, Yohei Matsumoto, Hanpei Koike, Tadayuki Matsumura, Kenichi Osada, Yaoko Nakagawa, Tadahiro Ohmi:
Development of a CAD tool for 3D-FPGAs. 3DIC 2010: 1-6
2000 – 2009
- 2008
- [j3]Yohei Matsumoto, Masakazu Hioki, Takashi Kawanami, Hanpei Koike, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa:
Suppression of Intrinsic Delay Variation in FPGAs using Multiple Configurations. ACM Trans. Reconfigurable Technol. Syst. 1(1): 3:1-3:31 (2008) - 2007
- [j2]Takashi Kawanami, Masakazu Hioki
, Yohei Matsumoto, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike:
Optimization of the Body Bias Voltage Set (BBVS) for Flex Power FPGA. IEICE Trans. Inf. Syst. 90-D(12): 1947-1955 (2007) - [c4]Yohei Matsumoto, Masakazu Hioki, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike:
Performance and yield enhancement of FPGAs with within-die variation using multiple configurations. FPGA 2007: 169-177 - [c3]Masakazu Hioki, Takashi Kawanami, Yohei Matsumoto, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike, Toshiyuki Tsutsumi:
A Power Configurable Block Array Connected in Series as First Prototype Flex Power FPGA Chip. FPT 2007: 285-288 - 2006
- [c2]Yohei Matsumoto, Hanpei Koike, Akira Masaki:
FPGAs with multidimensional mesh topology. FPGA 2006: 223 - [c1]Takashi Kawanami, Masakazu Hioki, Yohei Matsumoto, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike:
Optimal set of body bias voltages for an FPGA with field-programmable Vth components. FPT 2006: 329-332 - 2005
- [j1]Yohei Matsumoto, Akira Masaki:
FPGAs with Multidimensional Switch Topology. IEICE Trans. Inf. Syst. 88-D(4): 775-778 (2005)
Coauthor Index
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