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2020 – today
- 2023
[j10]Yongxia Sheng, Huaguo Liang, Bao Fang, Cuiyun Jiang, Zhengfeng Huang, Maoxiang Yi, Yingchun Lu:
Design of approximate Booth multipliers based on error compensation. Integr. 90: 183-189 (2023)- 2022
- [j9]Liang Yao
, Huaguo Liang, Qian Han, Hong Zhang, Zhengfeng Huang, Cuiyun Jiang, Maoxiang Yi, Yingchun Lu:
M-RO PUF: A portable pure digital RO PUF based on MUX unit. Microelectron. J. 119: 105314 (2022) - 2021
- [j8]Bao Fang, Huaguo Liang, Dawen Xu, Maoxiang Yi, Yongxia Sheng, Cuiyun Jiang, Zhengfeng Huang, Yingchun Lu:
Approximate multipliers based on a novel unbiased approximate 4-2 compressor. Integr. 81: 17-24 (2021) - [c6]Huaguo Liang, Danqing Li, Zhao Yang, Tianming Ni, Zhengfeng Huang, Cuiyun Jiang:
A N: 1 Single-Channel TDMA Fault-Tolerant Technique for TSVs in 3D-ICs. ITC-Asia 2021: 1-5 - 2020
- [j7]Yingchun Lu, Huaguo Liang, Liang Yao, Xinyu Wang, Haochen Qi, Maoxiang Yi, Cuiyun Jiang, Zhengfeng Huang:
Jitter-Quantizing-Based TRNG Robust Against PVT Variations. IEEE Access 8: 108482-108490 (2020)
2010 – 2019
- 2019
- [j6]Maoxiang Yi, Jingchang Bian, Tianming Ni, Cuiyun Jiang, Hao Chang, Huaguo Liang:
A Pulse Shrinking-Based Test Solution for Prebond Through Silicon via in 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(4): 755-766 (2019) - 2017
- [j5]Xiumin Xu, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yingchun Lu, Aibin Yan, Tianming Ni, Maoxiang Yi:
A single event transient detector in SRAM-based FPGAs. IEICE Electron. Express 14(12): 20170210 (2017) - [j4]Xiumin Xu, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yiming Ouyang, Xiangsheng Fang, Tianming Ni, Maoxiang Yi:
A highly reliable butterfly PUF in SRAM-based FPGAs. IEICE Electron. Express 14(14): 20170551 (2017) - 2016
- [j3]Aibin Yan, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yiming Ouyang, Xuejun Li:
An SEU resilient, SET filterable and cost effective latch in presence of PVT variations. Microelectron. Reliab. 63: 239-250 (2016) - 2015
- [j2]Aibin Yan, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Maoxiang Yi:
A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology. IEICE Trans. Electron. 98-C(12): 1171-1178 (2015) - 2010
- [j1]Wenfa Zhan, Huaguo Liang, Cuiyun Jiang, Zhengfeng Huang, Aiman H. El-Maleh:
A scheme of test data compression based on coding of even bits marking and selective output inversion. Comput. Electr. Eng. 36(5): 969-977 (2010)
2000 – 2009
- 2009
- [c5]Maoxiang Yi, Huaguo Liang, Kaihua Zhan, Cuiyun Jiang:
Optimal LFSR-Coding Test Data Compression Based on Test Cube Dividing. CSE (2) 2009: 698-702 - [c4]Huaguo Liang, Wenfa Zhan, Qiang Luo, Cuiyun Jiang:
A Test Vector Compression/Decompression Scheme Based on Logic Operation between Adjacent Bits (LOBAB) Coding. PRDC 2009: 11-16 - 2007
- [c3]Lei Zhang, Huaguo Liang, Wenfa Zhan, Cuiyun Jiang:
Block Marking and Updating Coding in Test Data Compression for SoC. ATS 2007: 467-472 - 2005
- [c2]Huaguo Liang, Maoxiang Yi, Xiangsheng Fang, Cuiyun Jiang:
A BIST Scheme Based on Selecting State Generation of Folding Counters. Asian Test Symposium 2005: 144-149 - 2003
- [c1]Huaguo Liang, Cuiyun Jiang:
Sharing BIST with Multiple Cores for System-on-a-Chip. Asian Test Symposium 2003: 418-423
Coauthor Index
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