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Mahanama Wickramasinghe
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2020 – today
- 2023
- [c4]Dinindu Thilakarathna, Heshan Dissanayake, Buddhi Perera, Roshan G. Ragel, Isuru Dasanayake, Mahanama Wickramasinghe, Isuru Nawinne:
RV32IMF Five-Stage Pipeline Implementation with Interrupt and Random Number Generation Units. ICIIS 2023: 1-6
2010 – 2019
- 2016
- [b1]Mahanama Wickramasinghe:
Thread level parallel processing for high performance and energy efficiency in application specific embedded systems. University of New South Wales, Sydney, Australia, 2016 - [c3]Mahanama Wickramasinghe, Hui Guo:
Data-Space Relocation to Improve Data Cache Performance for Embedded Multi-threaded Processor Systems. ICNCC 2016: 193-197 - 2015
- [c2]Mahanama Wickramasinghe, Hui Guo:
Effective hardware-level thread synchronization for high performance and power efficiency in application specific multi-threaded embedded processors. ICCD 2015: 311-318 - 2014
- [c1]Mahanama Wickramasinghe, Hui Guo:
Energy-Aware Thread Scheduling for Embedded Multi-threaded Processors: Architectural Level Design and Implementation. ISVLSI 2014: 178-183
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