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Janne Roos
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2010 – 2019
- 2014
- [j6]Pekka Miettinen, Mikko Honkala, Janne Roos, Martti Valtonen:
Benefits of Partitioning in a Projection-based and Realizable Model-order Reduction Flow. J. Electron. Test. 30(3): 271-285 (2014) - 2013
- [j5]Pekka Miettinen, Mikko Honkala, Janne Roos, Martti Valtonen:
Sparsification of Dense Capacitive Coupling of Interconnect Models. IEEE Trans. Very Large Scale Integr. Syst. 21(10): 1955-1959 (2013) - [c14]Mikko Honkala, Pekka Miettinen, Martti Valtonen, Janne Roos:
Admittance parameter formulation for realizable model-order reduction. ECCTD 2013: 1-4 - [c13]Pekka Miettinen, Mikko Honkala, Martti Valtonen, Janne Roos:
Realizable reduction of interconnect models with dense coupling. ECCTD 2013: 1-4 - 2011
- [j4]Pekka Miettinen, Mikko Honkala, Janne Roos, Martti Valtonen:
PartMOR: Partitioning-Based Realizable Model-Order Reduction Method for RLC Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(3): 374-387 (2011)
2000 – 2009
- 2009
- [c12]Antti Kallio, Timo Veijola, Janne Roos, Mikael Andersson, Martti Valtonen:
General measurement-based circuit model for symmetrical four-port RF transformers. ECCTD 2009: 371-374 - [c11]Pekka Miettinen, Mikko Honkala, Janne Roos, Martti Valtonen:
Partitioning-based second-order model-order reduction method for RC circuits. ECCTD 2009: 531-534 - [c10]Mikko Honkala, Ville Karanko, Janne Roos, Martti Valtonen:
Frequency/time block preconditioners for harmonic balance jacobians. ECCTD 2009: 607-610 - [c9]Tuukka Tuomisto, Anu Lehtovuori, Jarmo Virtanen, Janne Roos, Mikko Honkala, Martti Valtonen:
Enhanced multivariate steady-state time-domain method. ECCTD 2009: 615-618 - 2008
- [c8]Pekka Miettinen, Mikko Honkala, Janne Roos, Carsten Neff, Achim Basermann:
Study and development of an efficient RC-in-RC-out MOR method. ICECS 2008: 1277-1280 - 2007
- [j3]Janne Roos:
Speed-up and performance evaluation of piecewise-linear DC analysis. Int. J. Circuit Theory Appl. 35(4): 427-448 (2007) - 2005
- [j2]Janne Roos:
On simplex-based piecewise-linear approximations of non-linear mappings. Int. J. Circuit Theory Appl. 33(2): 109-134 (2005) - 2003
- [c7]Timo Palenius, Janne Roos:
An efficient reduced-order interconnect macromodel for time-domain simulation. ISCAS (4) 2003: 628-631 - 2002
- [c6]Sakari Aaltonen, Janne Roos:
Simple reduced-order macromodels with PRIMA. ICECS 2002: 367-370 - [c5]Janne Roos:
Development of simplex-based piecewise-linear approximations of nonlinear mappings. ICECS 2002: 545-548 - [c4]Timo Palenius, Janne Roos, Sakari Aaltonen:
Development and comparison of reduced-order interconnect macromodels for time-domain simulation. ICECS 2002: 757-760 - [c3]Janne Roos, Martti Valtonen, Jarmo Virtanen:
Implementation of piecewise-linear DC analysis in APLAC. ICECS 2002: 1139-1142 - 2000
- [c2]Janne Roos, Ville Karanko:
Always convergent piecewise-linear DC analysis by an appropriate choice of initial conditions. ISCAS 2000: 169-172
1990 – 1999
- 1999
- [j1]Janne Roos, Martti Valtonen:
An efficient piecewise‐linear DC analysis method for general non‐linear circuits. Int. J. Circuit Theory Appl. 27(3): 311-330 (1999) - 1996
- [c1]Janne Roos, Martti Valtonen:
General-purpose piecewise-linear DC analysis. ICECS 1996: 792-795
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