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B. Naresh Kumar Reddy
Person information
- affiliation: ICFAI Foundation for Higher Education, Hyderabad, India
- affiliation (PhD 2018): National Institute of Technology Goa, Farmagudi, India
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2020 – today
- 2025
- [j20]Aswin Sreekumar, Bolupadra Sai Shankar, B. Naresh Kumar Reddy:
Integrating error correction and detection techniques in RISC-V processor microarchitecture for enhanced reliability. Integr. 100: 102282 (2025) - 2024
- [j19]B. Veena Vani, Dharavath Kishan, Md. Waseem Ahmad, B. Naresh Kumar Reddy:
An efficient battery swapping and charging mechanism for electric vehicles using bat algorithm. Comput. Electr. Eng. 118: 109357 (2024) - [j18]B. Naresh Kumar Reddy, Aruru Sai Kumar:
Evaluating the effectiveness of Bat optimization in an adaptive and energy-efficient network-on-chip routing framework. J. Parallel Distributed Comput. 188: 104853 (2024) - [j17]Shaik Ummay Atiya, N. V. K. Ramesh, B. Naresh Kumar Reddy:
Classification of non-small cell lung cancers using deep convolutional neural networks. Multim. Tools Appl. 83(5): 13261-13290 (2024) - [j16]M. Sree Chandana, K. Raghava Rao, B. Naresh Kumar Reddy:
Developing an adaptive active sleep energy efficient method in heterogeneous wireless sensor network. Multim. Tools Appl. 83(5): 13689-13706 (2024) - [j15]B. Naresh Kumar Reddy, Md. Zia Ur Rahman, Aimé Lay-Ekuakille:
Enhancing Reliability and Energy Efficiency in Many-Core Processors Through Fault-Tolerant Network-on-Chip. IEEE Trans. Netw. Serv. Manag. 21(5): 5049-5062 (2024) - [c25]B. Naresh Kumar Reddy, Srinivasulu Jogi, Sarangam K:
Design and Implementation of an FPGA-based Emulator Circuit for MLP using Memristors. VDAT 2024: 1-6 - [c24]B. Naresh Kumar Reddy, Y. Charan Krishna, P. Naga Satya Nitish, Sitadevi Bharatula:
Optimizing Task Scheduling in Multi-thread Real-Time Systems using Augmented Particle Swarm Optimization. VLSID 2024: 666-671 - 2023
- [j14]K. Raghava Rao, B. Naresh Kumar Reddy, Aruru Sai Kumar:
Using advanced distributed energy efficient clustering increasing the network lifetime in wireless sensor networks. Soft Comput. 27(20): 15269-15280 (2023) - [j13]Aruru Sai Kumar, B. Naresh Kumar Reddy:
An Efficient Real-Time Embedded Application Mapping for NoC Based Multiprocessor System on Chip. Wirel. Pers. Commun. 128(4): 2937-2952 (2023) - [j12]B. Veena Vani, Dharavath Kishan, Md. Waseem Ahmad, B. Naresh Kumar Reddy:
Bat Optimization Model for Electric Vehicle Route Optimization Under Time-of-Use Electricity Pricing. Wirel. Pers. Commun. 131(3): 1461-1473 (2023) - [c23]B. Naresh Kumar Reddy, Tharakeshwar Appala, B. Veena Vani:
An Efficient Smart Gas Detecting System using MQ9 Sensor. ICCCNT 2023: 1-5 - [c22]B. Naresh Kumar Reddy, K. Sarangam, Sushmita Dandeliya, S. Pavan Sai Naidu, Naveen Kumar P:
Accelerating Sorting Performance on FPGA: Combining Quick Sort and Heap Sort through Hybrid Pipelining. iSES 2023: 405-408 - 2022
- [j11]B. Naresh Kumar Reddy, Subrat Kar:
Performance evaluation of modified mesh-based NoC architecture. Comput. Electr. Eng. 104(Part): 108404 (2022) - [j10]Aruru Sai Kumar, T. V. K. Hanumantha Rao, B. Naresh Kumar Reddy:
Performance and communication energy constrained embedded benchmark for fault tolerant core mapping onto NoC architectures. Int. J. Ad Hoc Ubiquitous Comput. 41(2): 108-117 (2022) - [j9]B. Naresh Kumar Reddy, B. Seetharamulu, G. Siva Krishna, B. Veena Vani:
An FPGA and ASIC Implementation of Cubing Architecture. Wirel. Pers. Commun. 125(4): 3379-3391 (2022) - [c21]Ajaydas. U. R, B. Naresh Kumar Reddy, Alex James:
Hardware Implementation of an efficient FIR filter for ECG Signal Denoising Application. ICECS 2022 2022: 1-4 - [c20]B. Naresh Kumar Reddy, Alex James, Aruru Sai Kumar:
Fault-Tolerant Core Mapping for NoC based architectures with improved Performance and Energy Efficiency. ICECS 2022 2022: 1-4 - 2021
- [c19]B. Naresh Kumar Reddy, Subrat Kar:
Energy Efficient and High Performance Modified Mesh based 2-D NoC Architecture. HPSR 2021: 1-5 - [c18]N. V. K. Ramesh, Mohanpradeep Reddy B, Bhavya Deepika B, N. Suresh, K. Raghava Rao, B. Naresh Kumar Reddy:
Identification of Tomato Crop Diseases Using Neural Networks-CNN. ICCCNT 2021: 1-5 - [c17]B. Naresh Kumar Reddy, Subrat Kar:
Machine Learning Techniques for the Prediction of NoC Core Mapping Performance. PRDC 2021: 1-4 - [c16]B. Naresh Kumar Reddy, Subrat Kar:
An Efficient Application Core Mapping Algorithm for Wireless Network-an-Chip. PRDC 2021: 157-160 - 2020
- [j8]B. Naresh Kumar Reddy, B. Veena Vani, G. Bhavya Lahari:
An efficient design and implementation of Vedic multiplier in quantum-dot cellular automata. Telecommun. Syst. 74(4): 487-496 (2020) - [j7]Shakeel Ahmed, N. V. K. Ramesh, B. Naresh Kumar Reddy:
A Highly Secured QoS Aware Routing Algorithm for Software Defined Vehicle Ad-Hoc Networks Using Optimal Trust Management Scheme. Wirel. Pers. Commun. 113(4): 1807-1821 (2020) - [c15]Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, B. Naresh Kumar Reddy:
A Single BJT 10.2 ppm/°C Bandgap Reference in 45nm CMOS Technology. ICCCNT 2020: 1-4 - [c14]Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, B. Naresh Kumar Reddy:
A two-stage opamp frequency Compensation technique by splitting the 2nd stage. ICCCNT 2020: 1-5 - [c13]B. Seetharamulu, B. Naresh Kumar Reddy, K. Bramha Naidu:
Deep Learning for Sentiment Analysis Based on Customer Reviews. ICCCNT 2020: 1-5
2010 – 2019
- 2019
- [j6]B. Naresh Kumar Reddy, Dharavath Kishan, B. Veena Vani:
Performance constrained multi-application network on chip core mapping. Int. J. Speech Technol. 22(4): 927-936 (2019) - [c12]Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, B. Naresh Kumar Reddy, B. Seetharamulu:
A Low Power Miller Compensation Technique for Two Stage Op-amp in 65nm CMOS Technology. ICCCNT 2019: 1-5 - [c11]Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, B. Naresh Kumar Reddy, B. Seetharamulu:
A High Frequency CMRR improvement technique for Differential Amplifiers in 45nm CMOS. ICCCNT 2019: 1-5 - [c10]Ramalingaswamy Cheruku, Pradeep Kumar Nalluri, Krishna Yogeshwar G. Gopi, J. B. S. Charan, V. Naga Sanketh, Nareshkumar Reddy Beechu:
A Bi-Level Cascaded Ensemble Framework for Effective Disease Diagnosis. TENCON 2019: 2059-2062 - [c9]B. Naresh Kumar Reddy, K. Sarangam, T. Veeraiah, Ramalingaswamy Cheruku:
SRAM cell with better read and write stability with Minimum area. TENCON 2019: 2164-2167 - 2018
- [j5]Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra:
An energy-efficient fault-aware core mapping in mesh-based network on chip systems. J. Netw. Comput. Appl. 105: 79-87 (2018) - [j4]Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra:
Hardware implementation of fault tolerance NoC core mapping. Telecommun. Syst. 68(4): 621-630 (2018) - [j3]Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra:
Energy-Aware and Reliability-Aware Mapping for NoC-Based Architectures. Wirel. Pers. Commun. 100(2): 213-225 (2018) - [c8]Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Saddam Zourob, Nabil Yassine, B. Naresh Kumar Reddy:
A Technique to Reduce the Capacitor Size in Two Stage Miller Compensated Opamp. ICCCNT 2018: 1-4 - [c7]Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Saddam Zourob, Nabil Yassine, B. Naresh Kumar Reddy:
High Performance Circuit Techniques for Nueral Front-End Design in 65nm CMOS. ICCCNT 2018: 1-4 - [c6]Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Saddam Zourob, Nabil Yassine, B. Naresh Kumar Reddy:
A 31 ppm/° C Pure CMOS Bandgap Reference by Exploiting Beta-Multiplier. VDAT 2018: 100-108 - [c5]B. Naresh Kumar Reddy, Sireesha:
An Energy-Efficient Core Mapping Algorithm on Network on Chip (NoC). VDAT 2018: 631-640 - 2017
- [j2]Naresh Kumar Reddy Becchu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra:
System level fault-tolerance core mapping and FPGA-based verification of NoC. Microelectron. J. 70: 16-26 (2017) - [j1]Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra:
High-performance and energy-efficient fault-tolerance core mapping in NoC. Sustain. Comput. Informatics Syst. 16: 1-10 (2017) - 2016
- [c4]B. Naresh Kumar Reddy, M. H. Vasantha, Kumar Y. B. Nithin:
A Gracefully Degrading and Energy-Efficient Fault Tolerant NoC Using Spare Core. ISVLSI 2016: 146-151 - 2015
- [c3]B. Naresh Kumar Reddy, N. Suresh, Janjhyam Venkata Naga Ramesh, T. Pavithra, Y. Krupa Bahulya, Pranose J. Edavoor, S. Janaki Ram:
An efficient approach for design and testing of FPGA programming using Lab VIEW. ICACCI 2015: 543-548 - [c2]K. Jayasree, B. Naresh Kumar Reddy, B. Srinuvasu Kumar, Janjhyam Venkata Naga Ramesh, Pranose J. Edavoor, Mohd Kashif Zia Ansari:
Poster: An Efficient Low Power & High Performance in MPSOC. WCI 2015: 708-711 - 2013
- [c1]B. Naresh Kumar Reddy, M. Naraimhulu, S. V. Sai Prasad, K. Khaja Babu:
An Efficient Online Mileage Indicator by Using Sensors for New Generation Automobiles. ADCONS 2013: 199-203
Coauthor Index
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last updated on 2024-12-02 22:26 CET by the dblp team
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