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ORCIDOhsuk Kwon
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2010 – 2019
- 2015
[c4]Jae-Woo Im, Woopyo Jeong, Doo-Hyun Kim, Sangwan Nam, Dong-Kyo Shim, Myung-Hoon Choi, Hyun-Jun Yoon, Dae-Han Kim, Youse Kim, Hyun Wook Park, Dong-Hun Kwak, Sang-Won Park, Seok-Min Yoon, Wook-Ghee Hahn, Jinho Ryu, Sang-Won Shim, Kyung-Tae Kang, Sung-Ho Choi, Jeong-Don Ihm, Young-Sun Min, In-Mo Kim, Doosub Lee, Ji-Ho Cho, Ohsuk Kwon, Ji-Sang Lee, Moosung Kim, Sang-Hyun Joo, Jae-hoon Jang, Sang-Won Hwang, Dae-Seok Byeon, Hyang-Ja Yang, Ki-Tae Park, Kyehyun Kyung, Jeong-Hyuk Choi:
7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate. ISSCC 2015: 1-3- 2012
- [c3]Seung-Hwan Shin, Dong-Kyo Shim, Jaeyong Jeong, Ohsuk Kwon, Sangyong Yoon, Myung-Hoon Choi, Tae-Young Kim, Hyun Wook Park, Hyun-Jun Yoon, Youngsun Song, Yoon-Hee Choi, Sang-Won Shim, Yang-Lo Ahn, Ki-Tae Park, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun:
A new 3-bit programming algorithm using SLC-to-TLC migration for 8MB/s high performance TLC NAND flash memory. VLSIC 2012: 132-133 - 2011
- [c2]Ki-Tae Park, Ohsuk Kwon, Sangyong Yoon, Myung-Hoon Choi, In-Mo Kim, Bo-Geun Kim, Min-Seok Kim, Yoon-Hee Choi, Seung-Hwan Shin, Youngson Song, Joo-Yong Park, Jae-Eun Lee, Chang-Gyu Eun, Ho-Chul Lee, Hyeong-Jun Kim, Jun-Hee Lee, Jong-Young Kim, Tae-Min Kweon, Hyun-Jun Yoon, Taehyun Kim, Dong-Kyo Shim, Jongsun Sel, Ji-Yeon Shin, Pansuk Kwak, Jin-Man Han, Keon-Soo Kim, Sungsoo Lee, Youngho Lim, Tae-Sung Jung:
A 7MB/s 64Gb 3-bit/cell DDR NAND flash memory in 20nm-node technology. ISSCC 2011: 212-213 - 2010
- [c1]Hyunggon Kim, Jung-Hoon Park, Ki-Tae Park, Pansuk Kwak, Ohsuk Kwon, Chulbum Kim, Younyeol Lee, Sangsoo Park, Kyungmin Kim, Doohyun Cho, Juseok Lee, Jungho Song, Soowoong Lee, Hyukjun Yoo, Sanglok Kim, Seungwoo Yu, Sungjun Kim, Sungsoo Lee, Kyehyun Kyung, Yong-Ho Lim, Chilhee Chung:
A 159mm2 32nm 32Gb MLC NAND-flash memory with 200MB/s asynchronous DDR interface. ISSCC 2010: 442-443
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