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ORCIDFelix Winterstein
Person information
- affiliation: Imperial College London, UK
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2010 – 2019
- 2017
[j3]Felix Winterstein
, Kermin Elliott Fleming, Hsin-Jung Yang, George A. Constantinides:
Custom Multicache Architectures for Heap Manipulating Programs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(5): 761-774 (2017)- [j2]Hsin-Jung Yang, Kermin Fleming, Felix Winterstein, Michael Adler, Joel S. Emer:
(FPL 2015) Scavenger: Automating the Construction of Application-Optimized Memory Hierarchies. ACM Trans. Reconfigurable Technol. Syst. 10(2): 13:1-13:23 (2017) - [c11]Hsin-Jung Yang, Kermin Fleming, Felix Winterstein, Annie I. Chen, Michael Adler, Joel S. Emer:
Automatic Construction of Program-Optimized FPGA Memory Networks. FPGA 2017: 125-134 - [c10]Felix Winterstein, George A. Constantinides:
Pass a pointer: Exploring shared virtual memory abstractions in OpenCL tools for FPGAs. FPT 2017: 104-111 - 2016
- [j1]Felix J. Winterstein, Samuel R. Bayliss, George A. Constantinides:
Separation Logic for High-Level Synthesis. ACM Trans. Reconfigurable Technol. Syst. 9(2): 10:1-10:23 (2016) - [c9]Nadesh Ramanathan, John Wickerson, Felix Winterstein, George A. Constantinides:
A Case for Work-stealing on FPGAs with OpenCL Atomics. FPGA 2016: 48-53 - [c8]Hsin-Jung Yang, Kermin Fleming, Michael Adler, Felix Winterstein, Joel S. Emer:
LMC: Automatic Resource-Aware Program-Optimized Memory Partitioning. FPGA 2016: 128-137 - 2015
- [c7]Felix Winterstein, Kermin Fleming, Hsin-Jung Yang, Samuel Bayliss, George A. Constantinides:
MATCHUP: Memory Abstractions for Heap Manipulating Programs. FPGA 2015: 136-145 - [c6]Hsin-Jung Yang, Kermin Fleming, Michael Adler, Felix Winterstein, Joel S. Emer:
Scavenger: Automating the construction of application-optimized memory hierarchies. FPL 2015: 1-8 - [c5]Felix Winterstein, Kermin Fleming, Hsin-Jung Yang, John Wickerson, George A. Constantinides:
Custom-sized caches in application-specific memory hierarchies. FPT 2015: 144-151 - 2014
- [c4]Felix Winterstein, Samuel Bayliss, George A. Constantinides:
Separation Logic-Assisted Code Transformations for Efficient High-Level Synthesis. FCCM 2014: 1-8 - [c3]Eduardo Aguilar-Pelaez, Samuel Bayliss, Alex I. Smith, Felix Winterstein, Dan R. Ghica, David B. Thomas, George A. Constantinides:
Compiling Higher Order Functional Programs to Composable Digital Hardware. FCCM 2014: 234 - 2013
- [c2]Felix Winterstein, Samuel Bayliss, George A. Constantinides:
FPGA-based K-means clustering using tree-based data structures. FPL 2013: 1-6 - [c1]Felix Winterstein, Samuel Bayliss, George A. Constantinides:
High-level synthesis of dynamic data structures: A case study using Vivado HLS. FPT 2013: 362-365
Coauthor Index
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