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2020 – today
- 2023
[j4]Konrad Jurasz, Dariusz Koscielnik
, Jakub Szyduczynski, Witold Machowski:
A New Successive Time Balancing Time-to-Digital Conversion Method. Sensors 23(24): 9712 (2023)- 2021
- [j3]Konrad Jurasz, Dariusz Koscielnik, Jakub Szyduczynski, Marek Miskowicz:
Systematization and Comparison of the Binary Successive Approximation Variants. Sensors 21(24): 8267 (2021) - 2020
- [c6]Jakub Szyduczynski, Dariusz Koscielnik, Konrad Jurasz, Marek Miskowicz:
Successive Approximation Time-to-Digital Converters. EBCCSP 2020: 1-7
2010 – 2019
- 2019
- [j2]Jakub Szyduczynski, Dariusz Koscielnik, Marek Miskowicz:
A Successive Approximation Time-to-Digital Converter with Single Set of Delay Lines for Time Interval Measurements. Sensors 19(5): 1109 (2019) - [c5]Jakub Szyduczynski, Viet Nguyen, Filippo Schembari, Robert Bogdan Staszewski, Dariusz Koscielnik, Marek Miskowicz:
Behavioral Modelling and Optimization of a Cyclic Feedback-Based Successive Approximation TDC with Dynamic Delay Equalization. EBCCSP 2019: 1-9 - 2017
- [c4]Jakub Szyduczynski, Dariusz Koscielnik, Marek Miskowicz:
Dynamic equalization of logic delays in feedback-based successive approximation TDCs. EBCCSP 2017: 1-6 - 2016
- [j1]Dariusz Koscielnik, Dominik Rzepka, Jakub Szyduczynski:
Sample-and-Hold Asynchronous Sigma-Delta Time Encoding Machine. IEEE Trans. Circuits Syst. II Express Briefs 63-II(4): 366-370 (2016) - [c3]Dariusz Koscielnik, Jakub Szyduczynski, Dominik Rzepka, Wojciech Andrysiewicz, Marek Miskowicz:
Optimized design of successive approximation time-to-digital converter with single set of delay lines. EBCCSP 2016: 1-8 - 2015
- [c2]Marek Miskowicz, Jakub Szyduczynski, Dariusz Koscielnik:
Analytical approach to multiple memoryless backoff contention analysis. WFCS 2015: 1-4 - 2013
- [c1]Dariusz Koscielnik, Marek Miskowicz, Jakub Szyduczynski:
Upper Bounds on Unsuccessful Transmission Rate in Persistent and Non-Persistent CSMA Protocols. ICCCN 2013: 1-5
Coauthor Index
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