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ORCIDPriyajit Mukherjee
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2020 – today
- 2020
[j8]Priyajit Mukherjee, Navonil Chatterjee, Santanu Chattopadhyay
:
Thermal-aware detour routing in 3D NoCs. J. Parallel Distributed Comput. 144: 230-245 (2020)
2010 – 2019
- 2019
- [j7]Priyajit Mukherjee, Kokil Jain, Santanu Chattopadhyay:
Thermal-aware task allocation and scheduling for periodic real-time applications in mesh-based heterogeneous NoCs. Real Time Syst. 55(4): 774-809 (2019) - 2018
- [j6]Priyajit Mukherjee, Sandeep D'Souza, Santanu Chattopadhyay:
Area Constrained Performance Optimized ASNoC Synthesis with Thermal‐aware White Space Allocation and Redistribution. Integr. 60: 167-189 (2018) - [j5]Navonil Chatterjee, Priyajit Mukherjee, Santanu Chattopadhyay:
Reliability-aware application mapping onto mesh based Network-on-Chip. Integr. 62: 92-113 (2018) - [j4]N. Prasad, Priyajit Mukherjee, Santanu Chattopadhyay, Indrajit Chakrabarti:
Design and evaluation of ZMesh topology for on-chip interconnection networks. J. Parallel Distributed Comput. 113: 17-36 (2018) - [j3]Kanchan Manna, Priyajit Mukherjee, Santanu Chattopadhyay, Indranil Sengupta:
Thermal-Aware Application Mapping Strategy for Network-on-Chip Based System Design. IEEE Trans. Computers 67(4): 528-542 (2018) - 2017
- [j2]Priyajit Mukherjee, Santanu Chattopadhyay:
Low Power Low Latency Floorplan‐aware Path Synthesis in Application-Specific Network-on-Chip Design. Integr. 58: 167-188 (2017) - [j1]Navonil Chatterjee, Suraj Paul, Priyajit Mukherjee, Santanu Chattopadhyay:
Deadline and energy aware dynamic task mapping and scheduling for Network-on-Chip based multi-core platform. J. Syst. Archit. 74: 61-77 (2017) - 2016
- [c5]Priyajit Mukherjee, Santanu Chattopadhyay:
An ILP-based floorplan-aware path synthesis technique for Application-Specific NoC design. RAIT 2016: 543-548 - [c4]Navonil Chatterjee, Priyajit Mukherjee, Santanu Chattopadhyay:
A strategy for fault tolerant reconfigurable Network-on-Chip design. VDAT 2016: 1-2 - 2013
- [c3]Soumyajit Poddar, Prasun Ghosal, Priyajit Mukherjee, Suman Samui, Hafizur Rahaman:
An Area and Power Efficient Dynamic TDMA Based Photonic Network on Chip. ISED 2013: 113-117 - 2012
- [c2]Soumyajit Poddar, Prasun Ghosal, Priyajit Mukherjee, Suman Samui, Hafizur Rahaman:
Design of an NoC with on-chip photonic interconnects using adaptive CDMA links. SoCC 2012: 352-357 - [c1]Soumyajit Poddar, Prasun Ghosal, Priyajit Mukherjee, Suman Samui, Hafizur Rahaman:
A Photonic Network on Chip with CDMA Links. VDAT 2012: 377-378
Coauthor Index
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