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2010 – 2019
- 2018
[c17]Germán Ceballos, Andreas Sembrant, Trevor E. Carlson, David Black-Schaffer:
Behind the Scenes: Memory Analysis of Graphical Workloads on Tile-Based GPUs. ISPASS 2018: 1-11- 2017
- [c16]Andreas Sembrant, Trevor E. Carlson, Erik Hagersten, David Black-Schaffer:
POSTER: Putting the G back into GPU/CPU Systems Research. PACT 2017: 130-131 - [c15]Andreas Sembrant, Erik Hagersten, David Black-Schaffer:
A Split Cache Hierarchy for Enabling Data-Oriented Optimizations. HPCA 2017: 133-144 - [c14]Andreas Sembrant, Trevor E. Carlson, Erik Hagersten, David Black-Schaffer:
A graphics tracing framework for exploring CPU+GPU memory systems. IISWC 2017: 54-65 - [c13]Germán Ceballos, Andreas Sembrant, Trevor E. Carlson, David Black-Schaffer:
Analyzing graphics workloads on tile-based GPUs. IISWC 2017: 108-109 - [c12]Gustaf Borgström, Andreas Sembrant, David Black-Schaffer:
Adaptive Cache Warming for Faster Simulations. RAPIDO 2017: 1 - 2016
- [b1]Andreas Sembrant:
Hiding and Reducing Memory Latency : Energy-Efficient Pipeline and Memory System Techniques. Uppsala University, Sweden, 2016 - [c11]Andreas Sembrant, Erik Hagersten, David Black-Schaffer:
Data placement across the cache hierarchy: Minimizing data movement with reuse-aware placement. ICCD 2016: 117-124 - 2015
- [c10]Arthur Perais
, André Seznec, Pierre Michaud, Andreas Sembrant, Erik Hagersten:
Cost-effective speculative scheduling in high performance processors. ISCA 2015: 247-259 - [c9]Andreas Sembrant, Trevor E. Carlson, Erik Hagersten, David Black-Schaffer, Arthur Perais, André Seznec, Pierre Michaud:
Long term parking (LTP): criticality-aware resource allocation in OOO processors. MICRO 2015: 334-346 - 2014
- [c8]Andreas Sembrant, Erik Hagersten, David Black-Schaffer:
Navigating the cache hierarchy with a single lookup. ISCA 2014: 133-144 - 2013
- [c7]Andreas Sandberg, Andreas Sembrant, Erik Hagersten, David Black-Schaffer:
Modeling performance variation due to cache sharing. HPCA 2013: 155-166 - [c6]Andreas Sembrant, Erik Hagersten, David Black-Schaffer:
TLC: a tag-less cache for reducing dynamic first level cache energy. MICRO 2013: 49-61 - 2012
- [c5]Andreas Sembrant, David Black-Schaffer, Erik Hagersten:
Phase guided profiling for fast cache modeling. CGO 2012: 175-185 - [c4]Andreas Sembrant, David Black-Schaffer, Erik Hagersten:
Phase behavior in serial and parallel applications. IISWC 2012: 47-58 - [c3]Vasileios Spiliopoulos, Andreas Sembrant, Stefanos Kaxiras:
Power-Sleuth: A Tool for Investigating Your Program's Power Behavior. MASCOTS 2012: 241-250 - [c2]Muneeb Khan, Andreas Sembrant, Erik Hagersten:
Low Overhead Instruction-Cache Modeling Using Instruction Reuse Profiles. SBAC-PAD 2012: 260-269 - 2011
- [c1]Andreas Sembrant, David Eklov, Erik Hagersten:
Efficient software-based online phase classification. IISWC 2011: 104-115
Coauthor Index
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