default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDShinji Nishimura
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2010 – 2019
- 2014
[j8]Takashi Takemoto, Hiroki Yamashita, Fumio Yuki, Noboru Masuda, Hidehiro Toyoda, Norio Chujo, Yong Lee, Shinji Tsuji, Shinji Nishimura:
A 25-Gb/s 2.2-W 65-nm CMOS Optical Transceiver Using a Power-Supply-Variation-Tolerant Analog Front End and Data-Format Conversion. IEEE J. Solid State Circuits 49(2): 471-485 (2014)- 2013
- [c10]Takashi Takemoto, Hiroki Yamashita, Fumio Yuki, Shinji Tsuji, Yong Lee, Koichiro Adachi, Kazunori Shinoda, Yasunobu Matsuoka, Toshiki Sugawara, Shinji Nishimura, Norio Chujo, Masaaki Nido, Kazuhiko Kurata, Junji Baba, Yoshinori Watanabe, Naoya Ikeda:
Compact and power-efficient 100-Gbps CMOS-based transceiver. OFC/NFOEC 2013: 1-3 - 2012
- [j7]Masashi Kono, Akihiro Kambe, Hidehiro Toyoda, Shinji Nishimura:
A Novel 400-Gb/s (100-Gb/s×4) Physical-Layer Architecture Using Low-Power Technology. IEICE Trans. Commun. 95-B(11): 3437-3444 (2012) - [c9]Takashi Takemoto, Hiroki Yamashita, Takehito Kamimura, Fumio Yuki, Noboru Masuda, Hidehiro Toyoda, Norio Chujo, Kenji Kogo, Yong Lee, Shinji Tsuji, Shinji Nishimura:
A 25-Gb/s 2.2-W optical transceiver using an analog FE tolerant to power supply noise and redundant data format conversion in 65-nm CMOS. VLSIC 2012: 106-107 - 2011
- [j6]Goichi Ono, Keiki Watanabe, Takashi Muto, Hiroki Yamashita, Koji Fukuda, Noboru Masuda, Ryo Nemoto, Eiichi Suzuki, Takashi Takemoto, Fumio Yuki, Masayoshi Yagyu, Hidehiro Toyoda, Masashi Kono, Akihiro Kambe, Seiichi Umai, Tatsuya Saito, Shinji Nishimura:
A 10: 4 MUX and 4: 10 DEMUX Gearbox LSI for 100-Gigabit Ethernet Link. IEEE J. Solid State Circuits 46(12): 3101-3112 (2011) - [c8]Goichi Ono, Keiki Watanabe, Takashi Muto, Hiroki Yamashita, Koji Fukuda, Noboru Masuda, Ryo Nemoto, Eiichi Suzuki, Takashi Takemoto, Fumio Yuki, Masayoshi Yagyu, Hidehiro Toyoda, Akihiro Kambe, Tatsuya Saito, Shinji Nishimura:
10: 4 MUX and 4: 10 DEMUX gearbox LSI for 100-gigabit Ethernet link. ISSCC 2011: 148-150 - 2010
- [j5]Hidehiro Toyoda, Goichi Ono, Shinji Nishimura:
100GbE PHY and MAC layer implementations. IEEE Commun. Mag. 48(3) (2010) - [c7]Takashi Takemoto, Fumio Yuki, Hiroki Yamashita, Shinji Tsuji, Tatsuya Saito, Shinji Nishimura:
A 25 Gb/s × 4-channel 74 mW/ch transimpedance amplifier in 65 nm CMOS. CICC 2010: 1-4
2000 – 2009
- 2008
- [c6]Hidehiro Toyoda, Michitaka Okuno, Shinji Nishimura, Matsuaki Terada:
A 100 Gb/s and High-Reliable Physical-Layer Architecture for VSR and Backplane Ethernet. ICC 2008: 5417-5421 - [c5]Masaki Yamada, Takeki Yazaki, Shinji Nishimura, Naoya Ikeda:
Technologies to Save Power for Carrier Class Routers and Switches. SAINT 2008: 385-388 - 2007
- [j4]Hidehiro Toyoda, Shinji Nishimura, Michitaka Okuno, Matsuaki Terada:
A 100-Gb/s-Physical-Layer Architecture for Higher-Speed Ethernet for VSR and Backplane Applications. IEICE Trans. Electron. 90-C(10): 1957-1963 (2007) - [c4]Takashi Ishikawa, Seishi Hanaoka, Mikio Kataoka, Masashi Yano, Shinji Nishimura:
Basic Simulation Result of Inter System Handover for Cognitive Radio. FGCN (2) 2007: 270-273 - 2006
- [j3]Hidehiro Toyoda, Shinji Nishimura, Michitaka Okuno, Kouji Fukuda, Kouji Nakahara, Hiroaki Nishi
:
100-Gb/s Physical-Layer Architecture for Next-Generation Ethernet. IEICE Trans. Commun. 89-B(3): 696-703 (2006) - [j2]Michitaka Okuno, Shinji Nishimura, Shinichi Ishida, Hiroaki Nishi:
Cache-Based Network Processor Architecture: Evaluation with Real Network Traffic. IEICE Trans. Electron. 89-C(11): 1620-1628 (2006) - 2005
- [c3]Hidehiro Toyoda, Shinji Nishimura, Michitaka Okuno, Ryouji Yamaoka, Hiroaki Nishi:
A 100-Gb-Ethernet subsystem for next-generation metro-area network. ICC 2005: 1036-1042 - 2001
- [c2]Shinji Nishimura, Tomohiro Kudoh, Hiroaki Nishi, Junji Yamamoto, Ryuichiro Ueno, Katsuyoshi Harasawa, Shuji Fukuda, Yasutaka Shikichi, Shigeto Akutsu, Koji Tasho, Hideharu Amano:
RHiNET-3/SW: an 80-Gbit/s high-speed network switch for distributed parallel computing. Hot Interconnects 2001: 119-123 - 2000
- [j1]Shinji Nishimura, Katsuyoshi Harasawa, N. Matsudaira, Shigeto Akutsu, Tomohiro Kudoh, Hiroaki Nishi, Hideharu Amano:
RHiNET-2/SW a Hight-throughput, Compact Network-switch Using 8.8-Gbit/s Optical Interconnection. New Gener. Comput. 18(2): 187-197 (2000)
1990 – 1999
- 1991
- [c1]Tetsuo Tajiri, Yutaka Suzuki, Shinji Nishimura, Hiroshi Yoshimura:
Single board video codec for ISDN visual telephone. ICASSP 1991: 2853-2856
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-09-28 02:23 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
