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1990 – 1999
- 1998
[j2]Stewart G. Smith, J. E. D. Hurwitz, Mairi J. Torrie, Donald J. Baxter, Andrew A. Murray, Paul Likoudis, Andrew J. Holmes, Mark J. Panaghiston, Robert K. Henderson
, Stuart Anderson, Peter B. Denyer, David Renshaw:
A single-chip CMOS 306×244-pixel NTSC video camera and a descendant coprocessor device. IEEE J. Solid State Circuits 33(12): 2104-2111 (1998)- 1997
- [c20]Peter B. Denyer, Jean Brouwers:
JavaTM in electronic design automation. ASP-DAC 1997: 141-144 - 1992
- [c19]C. S. Ramsay, K. Sutherland, David S. Renshaw, Peter B. Denyer:
A Comparison of Vector Quantization Codebook Generation Algorithms Applied to Automatic Face Recognition. BMVC 1992: 1-10 - [e1]Arne Halaas, Peter B. Denyer:
VLSI 91, Proceedings of the IFIP TC10/WG 10.5 International Conference on Very Large Scale Integration, Edinburgh, Scotland, 20-22 August, 1991. IFIP Transactions A-1, North-Holland 1992, ISBN 0-444-89019-X [contents] - 1991
- [c18]Douglas M. Grant, Peter B. Denyer:
Address Generation for array access based on modulus m counters. EURO-DAC 1991: 118-122 - [c17]Peter B. Denyer, David S. Renshaw, Gouyu Wang, Ming Ying Lu, Stuart Anderson:
On-Chip CMOS Sensors for VLSI Imaging Systems. VLSI 1991: 157-166 - 1990
- [c16]Douglas M. Grant, Peter B. Denyer:
Memory, Control and Communications Synthesis for Scheduled Algorithms. DAC 1990: 162-167 - [c15]David J. Mallon, Peter B. Denyer:
A new approach to pipeline optimisation. EURO-DAC 1990: 83-88
1980 – 1989
- 1989
- [c14]Douglas M. Grant, Peter B. Denyer, I. Finlay:
Synthesis of address generators. ICCAD 1989: 116-119 - 1988
- [j1]Steven G. Smith, Peter B. Denyer:
Advanced Serial-Data Computation. J. Parallel Distributed Comput. 5(3): 228-249 (1988) - 1987
- [c13]Steven G. Smith, Peter B. Denyer:
Synthesis of area-efficient VLSI architectures for vector and matrix multiplication. IEEE Symposium on Computer Arithmetic 1987: 13-20 - [c12]Steven G. Smith, Peter B. Denyer, David S. Renshaw, K. Asada, K. P. Coplan, M. Keightley, Javeed I. Mhar:
Full-span structural compilation of DSP hardware. ICASSP 1987: 495-498 - [c11]Steven G. Smith, Peter B. Denyer:
Serial/Parallel architectures for area-efficient vector multiplication. ICASSP 1987: 539-542 - [c10]Steven G. Smith, M. S. McGregor, Peter B. Denyer:
Techniques to increase the computational throughput of bit-serial architectures. ICASSP 1987: 543-546 - 1986
- [c9]Steven G. Smith, Peter B. Denyer:
Efficient bit-serial complex multiplication and sum-of-products computation using distributed arithmetic. ICASSP 1986: 2203-2206 - [c8]Steven G. Smith, A. Fitzgerald, Peter B. Denyer, David S. Renshaw, N. P. Wootton, R. Creasey:
A comparison of micro-DSP and Silicon compiler implementations of a polyphase network filter bank. ICASSP 1986: 2207-2210 - [c7]Peter B. Denyer:
Advanced Microelectronics as a Foundation for Future Computers (Panel). IFIP Congress 1986: 81-82 - 1984
- [c6]Gregory H. Allen, Peter B. Denyer, David S. Renshaw:
A bit serial linear array DFT. ICASSP 1984: 230-233 - [c5]Laurence E. Turner, Peter B. Denyer, David S. Renshaw:
A bit serial LDI recursive digital filter. ICASSP 1984: 238-241 - 1983
- [c4]Malcolm J. Rutter, Peter M. Grant, David S. Renshaw, Peter B. Denyer:
Design and realisation of adaptive lattice filters. ICASSP 1983: 21-24 - [c3]Peter B. Denyer, David S. Renshaw:
Case studies in VLSI signal processing using a silicon compiler. ICASSP 1983: 939-942 - [c2]Alan F. Murray, Peter B. Denyer, David S. Renshaw:
Self-Testing in Bit Serial VLSI Parts: High Coverage at Low Cost. ITC 1983: 260-268 - 1980
- [c1]Colin F. N. Cowan, H. Martin Reekie, John Mavor, John W. Arthur, Peter B. Denyer:
Miniature CCD-based analog adaptive filters. ICASSP 1980: 474-477
Coauthor Index
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