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ORCIDZhenyu Qi 0002
Person information
- affiliation: University of California Riverside, Riverside, CA, USA
Other persons with the same name
- Zhenyu Qi — disambiguation page
- Zhenyu Qi 0001 — University of Virginia, Charlottesville, VA, USA
- Zhenyu Qi 0003 — Institute of Automation, Chinese Academy of Sciences (CAS), China
- Zhenyu Qi 0004 — Sun Yat-sen University Cancer Center, Guangzhou, China
- Zhenyu Qi 0005
![[0009-0003-1195-3771]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0009-0003-1195-3771")
— University of Arizona, Tucson, AZ, USA
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2000 – 2009
- 2006
[j3]Zhenyu Qi, Hao Yu, Pu Liu, Sheldon X.-D. Tan, Lei He:
Wideband passive multiport model order reduction and realization of RLCM circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(8): 1496-1509 (2006)- [j2]Hang Li, Jeffrey Fan, Zhenyu Qi, Sheldon X.-D. Tan, Lifeng Wu, Yici Cai, Xianlong Hong:
Partitioning-Based Approach to Fast On-Chip Decoupling Capacitor Budgeting and Minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(11): 2402-2412 (2006) - 2005
- [j1]Sheldon X.-D. Tan, Weikun Guo, Zhenyu Qi:
Hierarchical approach to exact symbolic analysis of large analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(8): 1241-1250 (2005) - [c10]Hao Yu, Lei He, Zhenyu Qi, Sheldon X.-D. Tan:
A wideband hierarchical circuit reduction for massively coupled interconnects. ASP-DAC 2005: 111-114 - [c9]Zhenyu Qi, Sheldon X.-D. Tan, Hao Yu, Lei He:
Wideband modeling of RF/Analog circuits via hierarchical multi-point model order reduction. ASP-DAC 2005: 224-229 - [c8]Hang Li, Zhenyu Qi, Sheldon X.-D. Tan, Lifeng Wu, Yici Cai, Xianlong Hong:
Partitioning-based approach to fast on-chip decap budgeting and minimization. DAC 2005: 170-175 - [c7]Pu Liu, Zhenyu Qi, Hang Li, Lingling Jin, Wei Wu, Sheldon X.-D. Tan, Jun Yang:
Fast thermal simulation for architecture level dynamic thermal management. ICCAD 2005: 639-644 - [c6]Pu Liu, Sheldon X.-D. Tan, Hang Li, Zhenyu Qi, Jun Kong, Bruce McGaughy, Lei He:
An efficient method for terminal reduction of interconnect circuits considering delay variations. ICCAD 2005: 821-826 - [c5]Hang Li, Pu Liu, Zhenyu Qi, Lingling Jin, Wei Wu, Sheldon X.-D. Tan, Jun Yang:
Efficient Thermal Simulation for Run-Time Temperature Tracking and Management. ICCD 2005: 130-136 - [c4]Zhenyu Qi, Hang Li, Sheldon X.-D. Tan, Lifeng Wu, Yici Cai, Xianlong Hong:
Fast Decap Allocation Algorithm For Robust On-Chip Power Delivery. ISQED 2005: 542-547 - [c3]Pu Liu, Zhenyu Qi, Sheldon X.-D. Tan:
Passive Hierarchical Model Order Reduction and Realization of RLCM Circuits. ISQED 2005: 603-608 - 2004
- [c2]Sheldon X.-D. Tan, Weikun Guo, Zhenyu Qi:
Hierarchical approach to exact symbolic analysis of large analog circuits. DAC 2004: 860-863 - [c1]Sheldon X.-D. Tan, Zhenyu Qi, Hang Li:
Hierarchical Modeling and Simulation of Large Analog Circuits. DATE 2004: 740-741
Coauthor Index
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