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2020 – today
- 2020
[b1]Frank Bubenhagen:
Analysis and Enhancement of a Fault-Tolerant NoC for SRAM-based FPGAs in Space Applications (Analyse und Erweiterung eines fehler-toleranten NoC für SRAM-basierte FPGAs in Weltraumapplikationen). Braunschweig University of Technology, Germany, 2020
2010 – 2019
- 2013
- [c7]Holger Michel, Frank Bubenhagen, Kai Grurmann, Tobias Lange, Björn Fiethe, Harald Michalik:
Worst case error rate predictions and mitigation schemes for Virtex-4 FPGAs on solar orbiter. AHS 2013: 1-8 - [c6]Frank Bubenhagen, Björn Fiethe, Tobias Lange, Harald Michalik, Holger Michel:
Reconfigurable platforms for Data Processing on scientific space instruments. AHS 2013: 63-70 - 2012
- [c5]Holger Michel, Adrian Belger, Frank Bubenhagen, Björn Fiethe, Harald Michalik, Wayne Sullivan, Alex Wishart, Jørgen Ilstad:
The SoCWire protocol (SoCP): A flexible and minimal protocol for a Network-on-Chip. AHS 2012: 1-8 - [c4]Björn Fiethe, Frank Bubenhagen, Tobias Lange, Harald Michalik, Holger Michel, Joachim Woch, Johann Hirzberger:
Adaptive hardware by dynamic reconfiguration for the Solar Orbiter PHI instrument. AHS 2012: 31-37 - 2011
- [c3]Holger Michel, Frank Bubenhagen, Björn Fiethe, Harald Michalik, Björn Osterloh, Wayne Sullivan, Alex Wishart, Jørgen Ilstad, Sandi Habinc:
AMBA to SoCWire network on Chip bridge as a backbone for a Dynamic Reconfigurable Processing unit. AHS 2011: 227-233 - 2010
- [c2]Björn Osterloh, Harald Michalik, Björn Fiethe, Frank Bubenhagen:
Architecture verification of the SoCWire NoC approach for safe dynamic partial reconfiguration in space applications. AHS 2010: 1-8
2000 – 2009
- 2007
- [c1]Björn Osterloh, Harald Michalik, Björn Fiethe, Frank Bubenhagen:
Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application. AHS 2007: 258-262
Coauthor Index
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