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Sy-Chyuan Hwu

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Journal Articles

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2015
[j4]
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  - journals/jssc/HwuR15
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Sy-Chyuan Hwu, Behzad Razavi:
An RF Receiver for Intra-Band Carrier Aggregation. IEEE J. Solid State Circuits 50(4): 946-961 (2015)
2008
[j3]
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Che-Fu Liang, Sy-Chyuan Hwu, Shen-Iuan Liu:
A Jitter-Tolerance-Enhanced CDR Using a GDCO-Based Phase Detector. IEEE J. Solid State Circuits 43(5): 1217-1226 (2008)
2007
[j2]
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Che-Fu Liang, Sy-Chyuan Hwu, Shen-Iuan Liu:
A Multi-Band Burst-Mode Clock and Data Recovery Circuit. IEICE Trans. Electron. 90-C(4): 802-810 (2007)
2006
[j1]
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  - journals/jssc/YangCHLL06
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Rong-Jyi Yang, Kuan-Hua Chao, Sy-Chyuan Hwu, Chuan-Kang Liang, Shen-Iuan Liu:
A 155.52 mbps-3.125 gbps continuous-rate clock and data recovery circuit. IEEE J. Solid State Circuits 41(6): 1380-1390 (2006)

Conference and Workshop Papers

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2014
[c2]
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Sy-Chyuan Hwu, Behzad Razavi:
A receiver architecture for intra-band carrier aggregation. VLSIC 2014: 1-2
2006
[c1]
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Che-Fu Liang, Sy-Chyuan Hwu, Shen-Iuan Liu:
A 10Gbps Burst-Mode CDR Circuit in 0.18μm CMOS. CICC 2006: 599-602

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