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ORCIDPrabhakar Goel
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1980 – 1989
- 1988
[c9]Prabhakar Goel, Harry Chen:
Benchmarking of Test-Generation Systems. COMPCON 1988: 334-337- 1986
- [c8]Prabhakar Goel, Chi-Lai Huang, Robert E. Blauth:
Application of Parallel Processing to Fault Simulation. ICPP 1986: 785-788 - 1985
- [c7]Prabhakar Goel, Chi-Lai Huang:
Statistical Fault Sampling and Full Fault Simulation. ITC 1985: 801-802 - 1984
- [c6]Prabhakar Goel:
Testability Analysis will not Replace Fault Simulation. ITC 1984: 722-724 - 1982
- [c5]Prabhakar Goel, M. T. McMahon:
Electronic Chip-in-Place Test. DAC 1982: 482-488 - [c4]Sumit DasGupta, Prabhakar Goel, Ron G. Walther, Tom W. Williams:
A Variation of LSSD and Its Implications on Design and Test Pattern Generation in VLSI. ITC 1982: 63-66 - [c3]Prabhakar Goel, M. T. McMahon:
Electronic Chip-In-Place Test. ITC 1982: 83-91 - 1981
- [j2]Prabhakar Goel:
An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits. IEEE Trans. Computers 30(3): 215-222 (1981) - [c2]Prabhakar Goel, Barry C. Rosales:
PODEM-X: An automatic test generation system for VLSI logic structures. DAC 1981: 260-268 - 1980
- [c1]Prabhakar Goel:
Test generation costs analysis and projections. DAC 1980: 77-84
1970 – 1979
- 1974
- [j1]Prabhakar Goel, Daniel P. Siewiorek:
Comments on "Multiple Fault Detection in Combinational Networks". IEEE Trans. Computers 23(3): 333-334 (1974)
Coauthor Index
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