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Chun-Te Chen
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2000 – 2009
- 2006
- [c7]Chun-Te Chen, Kun-De Lin, Ying-Chieh Wu, Kun-Lin Lee:
An Approach of Digital Rights Management for E-Museum with Enforce Context Constraints in RBAC Environments. SMC 2006: 1871-1878 - [c6]Chun-Te Chen, Kun-Lin Lee, Ying-Chieh Wu, Kun-De Lin:
Construction of the Enterprise-level RFID Security and Privacy Management Using Role-Based Key Management. SMC 2006: 3310-3317 - 2004
- [c5]Chun-Te Chen, Te-Chung Lu:
A Mobile Ticket Validation by VSS Tech with Time-Stamp. EEE 2004: 267-270
1990 – 1999
- 1997
- [j2]Chun-Te Chen, Liang-Gee Chen, Jue-Hsuan Hsiao:
A bit-level pipelined VLSI architecture for the running order algorithm. IEEE Trans. Signal Process. 45(8): 2140-2144 (1997) - 1996
- [c4]Chun-Te Chen, Liang-Gee Chen:
A self-adjusting weighted median filter for removing impulse noise in images. ICIP (1) 1996: 419-422 - 1995
- [j1]Jue-Hsuan Hsiao, Liang-Gee Chen, Tzi-Dar Chiueh, Chun-Te Chen:
High throughput CORDIC-based systolic array design for the discrete cosine transform. IEEE Trans. Circuits Syst. Video Technol. 5(3): 218-225 (1995) - [c3]Chun-Te Chen, Liang-Gee Chen, Jue-Hsuan Hsiao:
A hardware-oriented design for weighted median filters. ASP-DAC 1995 - 1994
- [c2]Jue-Hsuan Hsiao, Liang-Gee Chen, Tzi-Dar Chiueh, Chun-Te Chen:
High Throughput CORDIC-Based Systolic Array Design for the Discrete Cosine Transform. ISCAS 1994: 85-88 - 1993
- [c1]Jue-Hsuan Hsiao, Liang-Gee Chen, Tzi-Dar Chiueh, Chun-Te Chen:
Novel Systolic Array Design for the Discrete Hartley Transform with High Throughput Rate. ISCAS 1993: 1567-1570
Coauthor Index
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